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参数资料
| 型号： | AD6620S |
| 厂商： | Analog Devices, Inc. |
| 英文描述： | 65 MSPS Digital Receive Signal Processor |
| 中文描述： | 65 MSPS的数字接收信号处理器 |
| 文件页数： | 24/43页 |
| 文件大小： | 354K |
| 代理商： | AD6620S |
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AD6620
–24–
REV. 0
The frequency response of the filter is given by the following
equations. The gain and pass band droop of CIC5 should be
calculated by these equations. Both parameters may be com-
pensated for in the RCF stage.
H( )
z
–
z
S
M
CIC
CIC
–
1
–
–
=
×
+
1
2
1
5
5
5
1
5
H( )
M
f
f
f
f
S
CIC
SAMP
SAMP
CIC
sin
sin
=
×
×
+
1
2
5
5
5
2
2
5
π
π
The scale factor, S
CIC5
is a programmable unsigned integer
between 0 and 20. It serves to control the attenuation of the
data into the CIC5 stage in 6 dB increments. For the best dy-
namic range, S
CIC5
should be set to the smallest value possible
(lowest attenuation) without creating an overflow condition.
This can be safely accomplished using the equation below,
where OL
CIC2
is the largest fraction of full scale possible at the
input to this filter stage. This value is output from the CIC2
stage then pipe-lined into the CIC5. S
CIC5
is ignored when this
filter is bypassed by setting M
CIC5
= 1.
S
ceil
M
OL
OL
M
OL
CIC
CIC
CIC
CIC
CIC
S
CIC
CIC
5
5
5
2
2
5
5
5
2
5
2
5
=
×
=
×
+
log (
)
–
The output rate of this stage is given by the equation below.
f
f
M
SAMP
SAMP
CIC
5
2
5
≤
CIC5 Rejection
The table below illustrates the amount of bandwidth in percent-
age of the clock rate that can be protected with various decima-
tion rates and alias rejection specifications. The maximum input
rate into the CIC5 is 32.5 MHz. As in the previous table, these
are the 1/2 bandwidth characteristics of the CIC5. Note that the
CIC5 stage can protect a much wider band to any given rejection.
Table IV. SSB CIC5 Alias Rejection Table (f
SAMP2
= 1)
M
CIC5
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
–50 dB –60 dB
–70 dB
–80 dB –90 dB
–100 dB
10.227
7.924
6.213
5.068
4.267
3.68
3.233
2.881
2.598
2.365
2.17
2.005
1.863
1.74
1.632
1.536
1.451
1.375
1.307
1.245
1.188
1.137
1.09
1.046
1.006
0.969
0.934
0.902
0.872
0.844
0.818
8.078
6.367
5.022
4.107
3.463
2.989
2.627
2.342
2.113
1.924
1.765
1.631
1.516
1.416
1.328
1.25
1.181
1.119
1.064
1.013
0.967
0.925
0.887
0.852
0.819
0.789
0.761
0.734
0.71
0.687
0.666
6.393
5.11
4.057
3.326
2.808
2.425
2.133
1.902
1.716
1.563
1.435
1.326
1.232
1.151
1.079
1.016
0.96
0.91
0.865
0.824
0.786
0.752
0.721
0.692
0.666
0.641
0.618
0.597
0.577
0.559
0.541
5.066
4.107
3.271
2.687
2.27
1.962
1.726
1.54
1.39
1.266
1.162
1.074
0.998
0.932
0.874
0.823
0.778
0.737
0.701
0.667
0.637
0.61
0.584
0.561
0.54
0.52
0.501
0.484
0.468
0.453
0.439
4.008
3.297
2.636
2.17
1.836
1.588
1.397
1.247
1.125
1.025
0.941
0.87
0.809
0.755
0.708
0.667
0.63
0.597
0.568
0.541
0.516
0.494
0.474
0.455
0.437
0.421
0.406
0.392
0.379
0.367
0.355
3.183
2.642
2.121
1.748
1.48
1.281
1.128
1.007
0.909
0.828
0.76
0.703
0.653
0.61
0.572
0.539
0.509
0.483
0.459
0.437
0.417
0.399
0.383
0.367
0.353
0.34
0.328
0.317
0.306
0.297
0.287
This table helps to calculate an upper bound on decimation,
M
CIC5
, given the desired filter characteristics.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD6620S/PCB | 制造商:Analog Devices 功能描述:DUAL CHANNEL DECIMATING RECEIV 制造商:Analog Devices 功能描述:SGNL PROCESSOR 169CSPBGA - Bulk |
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| AD6622PCB | 制造商:AD 制造商全称:Analog Devices 功能描述:Four-Channel, 75 MSPS Digital Transmit Signal Processor TSP |
| AD6622S | 制造商:AD 制造商全称:Analog Devices 功能描述:Four-Channel, 75 MSPS Digital Transmit Signal Processor TSP |
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