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参数资料
| 型号： | AD6657BBCZ |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | 无绳电话/电话 |
| 英文描述： | Quad IF Receiver; Package: Chip Scale BGA; No of Pins: 144; Temperature Range: Ind |
| 中文描述： | TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, PBGA144 |
| 封装： | 10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MO-205AC, CSPBGA-144 |
| 文件页数： | 17/32页 |
| 文件大小： | 1021K |
| 代理商： | AD6657BBCZ |
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AD6657
Rev. A | Page 24 of 32
BUILT-IN SELF-TEST (BIST) AND OUTPUT TEST
The AD6657 includes built-in test features designed to verify
the integrity of each channel and to facilitate board-level debug-
ging. A BIST (built-in self-test) feature is included that verifies
the integrity of the digital datapath of the AD6657. Various
output test options are also provided to place predictable values
on the outputs of the AD6657.
BUILT-IN SELF-TEST (BIST)
The BIST is a thorough test of the digital portion of the selected
AD6657 signal path. When enabled, the test runs from an internal
pseudorandom noise (PN) source through the digital datapath
starting at the ADC block output. The BIST sequence runs for
512 cycles and stops. The BIST signature value for the selected
channel is written to Register 0x24 and Register 0x25.
If more than one channel is BIST-enabled, the channel that
is first according to alphabetical order is written to the BIST
signature registers. For example, if Channel B and Channel C
are BIST-enabled, the results from Channel B are written to the
BIST signature registers.
The outputs are not disconnected during this test, so the PN
sequence can be observed as it runs. The PN sequence can be
continued from its last value or reset from the beginning, based
on the value programmed in Register 0x0E, Bit 2. The BIST
signature result varies based on the channel configuration.
OUTPUT TEST MODES
The output test options are shown in Table 13. When an output
test mode is enabled, the analog section of the receiver is dis-
connected from the digital back-end blocks, and the test pattern
is run through the output formatting block. Some of the test
patterns are subject to output formatting. The seed value for the
PN sequence tests can be forced if the PN reset bits are used to
hold the generator in reset mode by setting Bit 4 or Bit 5 of
Register 0x0D. These tests can be performed with or without an
analog signal (if present, the analog signal is ignored), but they
require an encode clock. For more information, see Application
Note AN-877, Interfacing to High Speed ADCs via SPI.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD6657BBCZRL | 功能描述:IC IF RCVR 11BIT 200MSPS 144BGA RoHS:是 类别:RF/IF 和 RFID >> RF 其它 IC 和模块 系列:- 标准包装:100 系列:* |
| AD6657EBZ | 功能描述:BOARD EVALUATION FOR AD6657 RoHS:是 类别:RF/IF 和 RFID >> RF 评估和开发套件，板 系列:- 标准包装:1 系列:- 类型:GPS 接收器 频率:1575MHz 适用于相关产品:- 已供物品:模块 其它名称:SER3796 |
| AD6659 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual IF Receiver |
| AD6659-80EBZ | 功能描述:BOARD EVALUATION FOR AD6659 RoHS:是 类别:RF/IF 和 RFID >> RF 评估和开发套件，板 系列:- 标准包装:1 系列:- 类型:GPS 接收器 频率:1575MHz 适用于相关产品:- 已供物品:模块 其它名称:SER3796 |
| AD6659BCPZ-80 | 功能描述:IC IF TO BASEBAND RCVR 64LFCSP RoHS:是 类别:RF/IF 和 RFID >> RF 其它 IC 和模块 系列:- 标准包装:100 系列:* |
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