- 您现在的位置：买卖IC网 > PDF目录294844 > AD6657BBCZ (ANALOG DEVICES INC) Quad IF Receiver; Package: Chip Scale BGA; No of Pins: 144; Temperature Range: Ind PDF资料下载
参数资料
| 型号： | AD6657BBCZ |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | 无绳电话/电话 |
| 英文描述： | Quad IF Receiver; Package: Chip Scale BGA; No of Pins: 144; Temperature Range: Ind |
| 中文描述： | TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, PBGA144 |
| 封装： | 10 X 10 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MO-205AC, CSPBGA-144 |
| 文件页数： | 3/32页 |
| 文件大小： | 1021K |
| 代理商： | AD6657BBCZ |
第1页第2页当前第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页
AD6657
Rev. A | Page 11 of 32
Pin No.
Mnemonic
Type
Description
M7
D1+AB
Output
Channel A and Channel B LVDS Output Data 1—True
L7
D1AB
Output
Channel A and Channel B LVDS Output Data 1—Complement
K8
D2+AB
Output
Channel A and Channel B LVDS Output Data 2—True
J8
D2AB
Output
Channel A and Channel B LVDS Output Data 2—Complement
M8
D3+AB
Output
Channel A and Channel B LVDS Output Data 3—True
L8
D3AB
Output
Channel A and Channel B LVDS Output Data 3—Complement
K9
D4+AB
Output
Channel A and Channel B LVDS Output Data 4—True
J9
D4AB
Output
Channel A and Channel B LVDS Output Data 4—Complement
M9
D5+AB
Output
Channel A and Channel B LVDS Output Data 5—True
L9
D5AB
Output
Channel A and Channel B LVDS Output Data 5—Complement
K10
D6+AB
Output
Channel A and Channel B LVDS Output Data 6—True
J10
D6AB
Output
Channel A and Channel B LVDS Output Data 6—Complement
M10
D7+AB
Output
Channel A and Channel B LVDS Output Data 7—True
L10
D7AB
Output
Channel A and Channel B LVDS Output Data 7—Complement
K11
D8+AB
Output
Channel A and Channel B LVDS Output Data 8—True
J11
D8AB
Output
Channel A and Channel B LVDS Output Data 8—Complement
M11
D9+AB
Output
Channel A and Channel B LVDS Output Data 9—True
L11
D9AB
Output
Channel A and Channel B LVDS Output Data 9—Complement
K12
D10+AB
Output
Channel A and Channel B LVDS Output Data 10—True
J12
D10AB
Output
Channel A and Channel B LVDS Output Data 10—Complement
M12
DCO+AB
Output
Data Clock LVDS Output for Channel A and Channel B—True
L12
DCOAB
Output
Data Clock LVDS Output for Channel A and Channel B—Complement
K1
D0+CD
Output
Channel C and Channel D LVDS Output Data 0—True
J1
D0CD
Output
Channel C and Channel D LVDS Output Data 0—Complement
M1
D1+CD
Output
Channel C and Channel D LVDS Output Data 1—True
L1
D1CD
Output
Channel C and Channel D LVDS Output Data 1—Complement
K2
D2+CD
Output
Channel C and Channel D LVDS Output Data 2—True
J2
D2CD
Output
Channel C and Channel D LVDS Output Data 2—Complement
M2
D3+CD
Output
Channel C and Channel D LVDS Output Data 3—True
L2
D3CD
Output
Channel C and Channel D LVDS Output Data 3—Complement
K3
D4+CD
Output
Channel C and Channel D LVDS Output Data 4—True
J3
D4CD
Output
Channel C and Channel D LVDS Output Data 4—Complement
M3
D5+CD
Output
Channel C and Channel D LVDS Output Data 5—True
L3
D5CD
Output
Channel C and Channel D LVDS Output Data 5—Complement
K4
D6+CD
Output
Channel C and Channel D LVDS Output Data 6—True
J4
D6CD
Output
Channel C and Channel D LVDS Output Data 6—Complement
M4
D7+CD
Output
Channel C and Channel D LVDS Output Data 7—True
L4
D7CD
Output
Channel C and Channel D LVDS Output Data 7—Complement
K5
D8+CD
Output
Channel C and Channel D LVDS Output Data 8—True
J5
D8CD
Output
Channel C and Channel D LVDS Output Data 8—Complement
M5
D9+CD
Output
Channel C and Channel D LVDS Output Data 9—True
L5
D9CD
Output
Channel C and Channel D LVDS Output Data 9—Complement
K6
D10+CD
Output
Channel C and Channel D LVDS Output Data 10—True
J6
D10CD
Output
Channel C and Channel D LVDS Output Data 10—Complement
M6
DCO+CD
Output
Data Clock LVDS Output for Channel C and Channel D—True
L6
DCOCD
Output
Data Clock LVDS Output for Channel C and Channel D—Complement
C9
MODE
Input
Mode Select Pin (Logic Low Enables NSR; Logic High Disables NSR)
C8
SYNC
Input
Digital Synchronization Pin
C7
PDWN
Input
Power-Down Input (Active High)
C6
SCLK
Input
SPI Clock
C5
SDIO
Input/output
SPI Data
C4
CSB
Input
SPI Chip Select (Active Low)
相关PDF资料 |
PDF描述 |
|---|---|
| AD7751AN | SPECIALTY ANALOG CIRCUIT, PDIP24 |
| AD7940BRM | 3mW, 100kSPS, 14-Bit ADC in 6-Lead SOT-23 |
| AD7940BRM-REEL7 | 3mW, 100kSPS, 14-Bit ADC in 6-Lead SOT-23 |
| AD7942 | 14-Bit, 250 kSPS PulSAR ADC in MSOP/QFN |
| AD7943BN | +3.3 V/+5 V Multiplying 12-Bit DACs |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD6657BBCZRL | 功能描述:IC IF RCVR 11BIT 200MSPS 144BGA RoHS:是 类别:RF/IF 和 RFID >> RF 其它 IC 和模块 系列:- 标准包装:100 系列:* |
| AD6657EBZ | 功能描述:BOARD EVALUATION FOR AD6657 RoHS:是 类别:RF/IF 和 RFID >> RF 评估和开发套件，板 系列:- 标准包装:1 系列:- 类型:GPS 接收器 频率:1575MHz 适用于相关产品:- 已供物品:模块 其它名称:SER3796 |
| AD6659 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual IF Receiver |
| AD6659-80EBZ | 功能描述:BOARD EVALUATION FOR AD6659 RoHS:是 类别:RF/IF 和 RFID >> RF 评估和开发套件，板 系列:- 标准包装:1 系列:- 类型:GPS 接收器 频率:1575MHz 适用于相关产品:- 已供物品:模块 其它名称:SER3796 |
| AD6659BCPZ-80 | 功能描述:IC IF TO BASEBAND RCVR 64LFCSP RoHS:是 类别:RF/IF 和 RFID >> RF 其它 IC 和模块 系列:- 标准包装:100 系列:* |
发布紧急采购，3分钟左右您将得到回复。