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参数资料
| 型号： | AD73422BB-80 |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | 数字信号处理 |
| 英文描述： | Dual Low Power CMOS Analog Front End with DSP Microcomputer |
| 中文描述： | 24-BIT, 52 MHz, MIXED DSP, PBGA119 |
| 封装： | PLASTIC, BGA-119 |
| 文件页数： | 35/36页 |
| 文件大小： | 396K |
| 代理商： | AD73422BB-80 |
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REV. 0
AD73422
–
35
–
input channel is being used in single-ended mode where the
internal inverting amplifier provides suitable gain to scale the
input signal relative to the ADC’s full-scale input range. The
buffered internal reference level at REFOUT is used via an
external buffer to provide power to the electret microphone.
This provides a quiet, stable supply for the microphone. If this
is not a concern, then the microphone can be powered from the
system power supply.
Analog Output
The AD73422’s differential analog output (VOUT) is produced
by an on-chip differential amplifier. The differential output can
be ac-coupled or dc-coupled directly to a load that can be a
headset or the input of an external amplifier (the specified
minimum resistive load on the output section is 150
.) It is
possible to connect the outputs in either a differential or a
single-ended configuration, but please note that the effective
maximum output voltage swing (peak-to-peak) is halved in the
case of single-ended connection. Figure 32 shows a simple cir-
cuit providing a differential output with ac coupling. The ca-
pacitors in this circuit (C
OUT
) are optional; if used, their value
can be chosen as follows:
C
f R
OUT
LOAD
=
1
2
π
where
f
C
= desired cutoff frequency.
CONTINUOUS
TIME
LOW-PASS
FILTER
V
REF
VFBN1
VINN1
VINP1
VFBP1
VOUTP1
VOUTN1
REFCAP
REFOUT
AD73422
V
REF
+6/
–
15dB
PGA
REFERENCE
0/38dB
PGA
GAIN
1
R
LOAD
C
OUT
C
OUT
C
REFCAP
Figure 32. Example Circuit for Differential Output
Figure 33 shows an example circuit for providing a single-ended
output with ac coupling. The capacitor of this circuit (C
OUT
) is
not optional if dc current drain is to be avoided.
CONTINUOUS
TIME
LOW-PASS
FILTER
V
REF
VFBN1
VINN1
VINP1
VFBP1
VOUTP1
VOUTN1
REFCAP
REFOUT
AD73422
+6/
–
15dB
PGA
REFERENCE
0.1 F
GAIN
1
R
LOAD
C
OUT
Figure 33. Example Circuit for Single-Ended Output
Differential-to-Single-Ended Output
In some applications it may be desirable to convert the full
differential output of the decoder channel to a single-ended
signal. The circuit of Figure 34 shows a scheme for doing this.
CONTINUOUS
TIME
LOW-PASS
FILTER
V
REF
VFBN1
VINN1
VINP1
VFBP1
VOUTP1
VOUTN1
REFCAP
REFOUT
AD73422
V
REF
+6/
–
15dB
PGA
REFERENCE
0/38dB
PGA
GAIN
1
0.1 F
R
I
R
LOAD
R
F
R
I
R
F
Figure 34. Example Circuit for Differential-to-Single-
Ended Output Conversion
相关PDF资料 |
PDF描述 |
|---|---|
| AD73422 | Dual Low Power CMOS Analog Front End with DSP Microcomputer(带DSP微计算机的双模拟前端) |
| AD73422BB-40 | Dual Low Power CMOS Analog Front End with DSP Microcomputer |
| AD73460BB-80 | Six-Input Channel Analog Front End |
| AD73460 | Six-Input Channel Analog Front End |
| AD73460BB-40 | Six-Input Channel Analog Front End |
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