参数资料
型号: AD7703AR
厂商: Analog Devices Inc
文件页数: 12/16页
文件大小: 0K
描述: IC ADC 20BIT LC2MOS 20-SOIC
标准包装: 1
位数: 20
采样率(每秒): 4k
数据接口: 串行
转换器数目: 1
功率耗散(最大): 37mW
电压电源: 模拟和数字,双 ±
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-SOIC(0.295",7.50mm 宽)
供应商设备封装: 20-SOIC W
包装: 管件
输入数目和类型: 1 个单端,单极;1 个单端,双极
REV. E
AD7703
–5–
DATA
VALID
t
15
HI-Z
SDATA
CS
Figure 5b. SEC Mode Data Hold Time
HI-Z
DB19
DB18
DB1
DB0
HI-Z
SCLK
SDATA
CLKIN
CS
HI-Z
t
7
t
8
t
5
t
9
t
4
t
8
HI-Z
Figure 6. SSC Mode Timing Diagram
DEFINITION OF TERMS
Linearity Error
This is the maximum deviation of any code from a straight line
passing through the endpoints of the transfer function. The
endpoints of the transfer function are zero-scale (not to be
confused with bipolar zero), a point 0.5 LSB below the first code
transition (000 . . . 000 to 000 . . . 001) and full-scale, a point
1.5 LSB above the last code transition (111 . . . 110 to 111 . . .
111). The error is expressed as a percentage of full scale.
Differential Linearity Error
This is the difference between any code’s actual width and the
ideal (1 LSB) width. Differential linearity error is expressed in
LSB. A differential linearity specification of
± 1 LSB or less
guarantees monotonicity.
Positive Full-Scale Error
Positive full-scale error is the deviation of the last code transition
(111 . . . 110 to 111 . . . 111) from the ideal (VREF
±3/2 LSB).
It applies to both positive and negative analog input ranges and
is expressed in microvolts.
Unipolar Offset Error
Unipolar offset error is the deviation of the first code transition
from the ideal (AGND + 0.5 LSB) when operating in the
Unipolar mode.
Bipolar Zero Error
This is the deviation of the midscale transition (0111 . . . 111 to
1000 . . . 000) from the ideal (AGND – 0.5 LSB) when operating
in the Bipolar mode. It is expressed in microvolts.
Bipolar Negative Full-Scale Error
This is the deviation of the first code transition from the ideal
(–VREF + 0.5 LSB) when operating in the Bipolar mode.
Positive Full-Scale Overrange
Positive full-scale overrange is the amount of overhead available
to handle input voltages greater than +VREF (for example, noise
peaks or excess voltages due to system gain errors in system
calibration routines) without introducing errors due to overloading
the analog modulator or overflowing the digital filter.
Negative Full-Scale Overrange
This is the amount of overhead available to handle voltages below
–VREF without overloading the analog modulator or overflowing
the digital filter. Note that the analog input will accept negative
voltage peaks even in the Unipolar mode.
Offset Calibration Range
In the system calibration modes (SC2 low), the AD7703 calibrates
its offset with respect to the AIN pin. The offset calibration range
specification defines the range of voltages, expressed as a
percentage of VREF, that the AD7703 can accept and still accurately
calibrate offset.
Full-Scale Calibration Range
This is the range of voltages that the AD7703 can accept in the
system calibration mode and still correctly calibrate full scale.
Input Span
In system calibration schemes, two voltages applied in sequence
to the AD7703’s analog input define the analog input range. The
input span specification defines the minimum and maximum
input voltages from zero to full scale that the AD7703 can accept
and still accurately calibrate gain. The input span is expressed
as a percentage of VREF.
DATA
VALID
t
10
HI-Z
SDATA
CS
Figure 4. SSC Mode Data Hold Time
HI-Z
DB18
DB1
DB0
HI-Z
SDATA
DRDY
CS
t
12
t
11
t
13
t
14
SCLK
t
16
DB19
Figure 5a. SEC Mode Timing Diagram
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