- 您现在的位置：买卖IC网 > PDF目录10208 > AD7851KRZ-REEL (Analog Devices Inc)IC ADC 14BIT SRL 333KSPS 24-SOIC PDF资料下载
参数资料
| 型号： | AD7851KRZ-REEL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 25/36页 |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT SRL 333KSPS 24-SOIC |
| 标准包装： | 1,000 |
| 位数： | 14 |
| 采样率（每秒）： | 333k |
| 数据接口： | 8051，QSPI?，串行，SPI? µP |
| 转换器数目： | 2 |
| 功率耗散（最大）： | 89.25mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | 0°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 24-SOIC W |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 1 个伪差分，单极；1 个伪差分，双极 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页当前第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页
–31–
REV. B
AD7851
(8XC51/L51)
/PIC17C42
P3.0/DT
P3.1/CK
AD7851
CONVST
CLKIN
SCLK
DIN
SYNC
SM1
SM2
POLARITY
OPTIONAL
7MHz/6MHz
BUSY
(
INT0/P3.2)/INT
DGND FOR 8XC51/L51
DVDD FOR PIC17C42
MASTER
SLAVE
OPTIONAL
Figure 45. 8XC51/PIC17C42 Interface
AD7851 to 68HC11/16/L11/PIC16C42 Interface
Figure 46 shows the AD7851 SPI/QSPI interface to the
68HC11/16/L11/PIC16C42. The
SYNC line is not used and is
tied to DGND. The
Controller is configured as the master by
setting the MSTR bit in the SPCR to 1, and thus provides the
serial clock on the SCK pin. For all the
Controllers, the CPOL
bit is set to 1, and for the 68HC11/16/L11, the CPHA bit is set
to 1. The CLKIN and
CONVST signals can be supplied from
the
Controller or from separate sources. The BUSY signal can
be used as an interrupt to tell the
Controller when the conver-
sion is finished, then the reading and writing can take place. If
required, the reading and writing can take place during conver-
sion and there will be no need for the BUSY signal in this case.
For no writing to the part then the DIN pin can be tied perma-
nently low. For the 68HC16 and the QSPI interface, the SM2
pin should be tied high and the
SS line tied to the SYNC pin.
The microsequencer on the 68HC16 QSPI port can be used for
performing a number of read and write operations independent
of the CPU and storing the conversion results in memory with-
out taxing the CPU. The typical sequence of events would be
writing to the control register via the DIN line setting a conversion
start and at the same time reading data from the previous conver-
sion on the DOUT line, wait for the conversion to be finished
(3.25
s with 6 MHz CLKIN), and then repeat the sequence. The
maximum serial frequency will be determined by the data access
and hold times of the
Controllers and the AD7851.
68HC11/16/
L11/PIC16C42
SCK
SS
AD7851
CONVST
CLKIN
SCLK
DOUT
BUSY
SM1
SM2
POLARITY
OPTIONAL
7MHz/6MHz
SYNC
MISO
DIN AT DGND FOR
NO WRITING TO PART
MASTER
SLAVE
DIN
DVDD
OPTIONAL
IRQ
MOSI
DVDDFOR HC11, SPI
DGND FOR HC16, QSPI
DVDD
SPI
HC16, QSPI
Figure 46. 68HC11 and 68HC16 Interface
MICROPROCESSOR INTERFACING
In many applications, the user may not require the facility of
writing to the on-chip registers. The user may just want to
hardwire the relevant pins to the appropriate levels and read
the conversion result. In this case, the DIN pin can be tied low
so that the on-chip registers are never used. Now the part will
operate as a nonprogrammable analog-to-digital converter where
the
CONVST is applied, a conversion is performed, and the result
may be read using the SCLK to clock out the data from the output
register on to the DOUT pin. Note that the DIN pin cannot be
tied low when using the 2-wire interface mode of operation.
The SCLK can also be connected to the CLKIN pin if the user
does not want to have to provide separate serial and master
clocks in Interface Modes 1, 2, and 3. With this arrangement,
the
SYNC signal must be low for 16 SCLK cycles in Interface
Modes 1 and 2 for the read and write operations. For Interface
Mode 3, the
SYNC can be low for more than 16 SCLK cycles
for the read and write operations. Note that in Interface Modes 4
and 5 the CLKIN and SCLK cannot be tied together as the
SCLK is an output and the CLKIN is an input.
DIN
DOUT
SYNC
CONVST
CLKIN
SCLK
AD7851
7 MHz/6MHz
MASTER
CLOCK
SYNC SIGNAL
TO GATE
THE SCLK
SERIAL DATA
OUTPUT
CONVERSION
START
Figure 44. Simplified Interface Diagram with DIN
Grounded and SCLK Tied to CLKIN
AD7851 to 8XC51/PIC17C42 Interface
Figure 45 shows the AD7851 interface to the 8XC51/PIC17C42,
which only runs at 5 V. The 8XC51 is in Mode 0 operation.
This is a 2-wire interface consisting of the SCLK and the DIN
which acts as a bidirectional line. The
SYNC is tied low. The
BUSY line can be used to give an interrupt driven system but
this would not normally be the case with the 8XC51/PIC17C42.
For the 8XC51, 12 MHz version, the serial clock will run at a
maximum of 1 MHz so that the serial interface to the AD7851
will only be running at 1 MHz. The CLKIN signal must be pro-
vided separately to the AD7851 from a port line on the 8XC51
or from a source other than the 8XC51. Here the SCLK cannot
be tied to the CLKIN as the 8XC51 only provides a noncon-
tinuous serial clock. The
CONVST signal can be provided from
an external timer or conversion can be started in software if
required. The sequence of events would typically be writing to
the control register via the DIN line setting a conversion start
and the 2-wire interface mode (this would be performed in two
8-bit writes), wait for the conversion to be finished (3.25
s with
6 MHz CLKIN), read the conversion result data on the DIN line
(this would be performed in two 8-bit reads), and then repeat the
sequence. The maximum serial frequency will be determined by
the data access and hold times of the 8XC51/PIC17C42 and the
AD7851.
相关PDF资料 |
PDF描述 |
|---|---|
| AD9238BSTZRL-20 | IC ADC 12BIT DUAL 20MSPS 64LQFP |
| VI-B3T-MW-F3 | CONVERTER MOD DC/DC 6.5V 100W |
| SP310ECT-L/TR | IC DVR/RCVR RS232 5V SGL 18WSOIC |
| AD9238BCPZRL-20 | IC ADC 12BIT DUAL 20MSPS 64LFCSP |
| VI-B3T-MW-F2 | CONVERTER MOD DC/DC 6.5V 100W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD7851KRZ-REEL3 | 制造商:AD 制造商全称:Analog Devices 功能描述:14-Bit 333 kSPS Serial A/D Converter |
| AD7853 | 制造商:AD 制造商全称:Analog Devices 功能描述:3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
| AD7853AN | 制造商:Analog Devices 功能描述:ADC Single SAR 200ksps 12-bit Serial 24-Pin PDIP 制造商:Analog Devices 功能描述:ADC SGL SAR 200KSPS 12-BIT SERL 24PDIP - Rail/Tube 制造商:Rochester Electronics LLC 功能描述:SELF CAL.SERIAL 12-BIT ADC I.C. - Bulk 制造商:Analog Devices 功能描述:3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
| AD7853ANZ | 功能描述:IC ADC 12BIT SRL 200KSPS 24-DIP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 位数:12 采样率（每秒）:3M 数据接口:- 转换器数目:- 功率耗散（最大）:- 电压电源:- 工作温度:- 安装类型:表面贴装 封装/外壳:SOT-23-6 供应商设备封装:SOT-23-6 包装:带卷 (TR) 输入数目和类型:- |
| AD7853AR | 制造商:Analog Devices 功能描述:ADC Single SAR 200ksps 12-bit Serial 24-Pin SOIC W 制造商:Rochester Electronics LLC 功能描述:SELF CAL.SERIAL 12-BIT ADC I.C. - Bulk |
发布紧急采购，3分钟左右您将得到回复。