参数资料
型号: AD7949BCPZRL7
厂商: Analog Devices Inc
文件页数: 28/32页
文件大小: 0K
描述: IC ADC 14BIT 250KSPS 8CH 20LFCSP
产品培训模块: Power Line Monitoring
产品变化通告: Startup Circuitry Design Improvement Change 15/April/2009
标准包装: 1,500
系列: PulSAR®
位数: 14
采样率(每秒): 250k
数据接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
功率耗散(最大): 15.5mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-VFQFN 裸露焊盘,CSP
供应商设备封装: 20-LFCSP-VQ
包装: 带卷 (TR)
输入数目和类型: *
Data Sheet
AD7949
Rev. D | Page 5 of 32
Parameter
Conditions/Comments
Min
Typ
Max
Unit
INTERNAL REFERENCE
REF Output Voltage
2.5 V, @ 25°C
2.490
2.500
2.510
V
4.096 V, @ 25°C
4.086
4.096
4.106
V
REFIN Output Voltage7
2.5 V, @ 25°C
1.2
V
4.096 V, @ 25°C
2.3
V
REF Output Current
±300
A
Temperature Drift
±10
ppm/°C
Line Regulation
VDD = 5 V ± 5%
±15
ppm/V
Long-Term Drift
1000 hours
50
ppm
Turn-On Settling Time
CREF = 10 F
5
ms
EXTERNAL REFERENCE
Voltage Range
REF input
0.5
VDD + 0.3
V
REFIN input (buffered)
0.5
VDD 0.5
V
Current Drain
250 kSPS, REF = 5 V
50
A
TEMPERATURE SENSOR
Output Voltage8
@ 25°C
283
mV
Temperature Sensitivity
1
mV/°C
DIGITAL INPUTS
Logic Levels
VIL
0.3
+0.3 × VIO
V
VIH
0.7 × VIO
VIO + 0.3
V
IIL
1
+1
A
IIH
1
+1
A
DIGITAL OUTPUTS
Data Format9
Pipeline Delay10
VOL
ISINK = +500 A
0.4
V
VOH
ISOURCE = 500 A
VIO 0.3
V
POWER SUPPLIES
VDD
Specified performance
2.3
5.5
V
VIO
Specified performance
2.3
VDD + 0.3
V
Operating range
1.8
VDD + 0.3
V
Standby Current11, 12
VDD and VIO = 5 V, @ 25°C
50
nA
Power Dissipation
VDD = 2.5 V, 100 SPS throughput
1.5
W
VDD = 2.5 V, 100 kSPS throughput
1.45
2.0
mW
VDD = 2.5 V, 200 kSPS throughput
2.9
4.0
mW
VDD = 5 V, 250 kSPS throughput
10.8
12.5
mW
VDD = 5 V, 250 kSPS throughput with internal
reference
13.5
15.5
mW
Energy per Conversion
50
nJ
TEMPERATURE RANGE13
Specified Performance
TMIN to TMAX
40
+85
°C
1
See the Analog Inputs section.
2
The bandwidth is set in the configuration register.
3
LSB means least significant bit. With the 5 V input range, one LSB = 305 V.
4
See the Terminology section. These specifications include full temperature range variation but not the error contribution from the external reference.
5
With VDD = 5 V, unless otherwise noted.
6
All specifications expressed in decibels are referred to a full-scale input FSR and tested with an input signal at 0.5 dB below full scale, unless otherwise specified.
7
This is the output from the internal band gap.
8
The output voltage is internal and present on a dedicated multiplexer input.
9
Unipolar mode: serial 14-bit straight binary.
Bipolar mode: serial 14-bit twos complement.
10
Conversion results available immediately after completed conversion.
11
With all digital inputs forced to VIO or GND as required.
12
During acquisition phase.
13
Contact an Analog Devices, Inc., sales representative for the extended temperature range.
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