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| 型号： | AD9233BCPZRL7-105 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 1/44页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT 105MSPS 48-LFCSP |
| 标准包装： | 750 |
| 位数： | 12 |
| 采样率（每秒）： | 105M |
| 数据接口： | 串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 350mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 48-LFCSP-VQ（7x7） |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 2 个单端，单极；1 个差分，单极 |
| 配用： | AD9233-125EBZ-ND - BOARD EVALUATION FOR AD9233 |
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12-Bit, 80 MSPS/105 MSPS/125 MSPS,
1.8 V Analog-to-Digital Converter
AD9233
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2006 Analog Devices, Inc. All rights reserved.
FEATURES
1.8 V analog supply operation
1.8 V to 3.3 V output supply
SNR = 69.5 dBc (70.5 dBFS) to 70 MHz input
SFDR = 85 dBc to 70 MHz input
Low power: 395 mW @ 125 MSPS
Differential input with 650 MHz bandwidth
On-chip voltage reference and sample-and-hold amplifier
DNL = ±0.15 LSB
Flexible analog input: 1 V p-p to 2 V p-p range
Offset binary, Gray code, or twos complement data format
Clock duty cycle stabilizer
Data output clock
Serial port control
Built-in selectable digital test pattern generation
Programmable clock and data alignment
APPLICATIONS
Ultrasound equipment
IF sampling in communications receivers
IS-95, CDMA-One, IMT-2000
Battery-powered instruments
Hand-held scopemeters
Low cost digital oscilloscopes
GENERAL DESCRIPTION
The AD9233 is a monolithic, single 1.8 V supply, 12-bit, 80 MSPS/
105 MSPS/125 MSPS analog-to-digital converter (ADC), featuring
a high performance sample-and-hold amplifier (SHA) and on-
chip voltage reference. The product uses a multistage differential
pipeline architecture with output error correction logic to
provide 12-bit accuracy at 125 MSPS data rates and guarantees
no missing codes over the full operating temperature range.
The wide bandwidth, truly differential SHA allows a variety of
user-selectable input ranges and offsets, including single-ended
applications. It is suitable for multiplexed systems that switch
full-scale voltage levels in successive channels and for sampling
single-channel inputs at frequencies well beyond the Nyquist rate.
Combined with power and cost savings over previously available
ADCs, the AD9233 is suitable for applications in communications,
imaging, and medical ultrasound.
A differential clock input controls all internal conversion cycles. A
duty cycle stabilizer (DCS) compensates for wide variations in the
clock duty cycle while maintaining excellent overall ADC
performance.
FUNCTIONAL BLOCK DIAGRAM
DRVDD
AVDD
AGND
0.5V
CLK–
PDWN DRGND
OR
VIN+
VIN–
REFT
REFB
AD9233
VREF
SENSE
SHA
A/D
MDAC1
4
8
13
3
A/D
8-STAGE
1 1/2-BIT PIPELINE
REF
SELECT
CLK+
CLOCK
DUTY CYCLE
STABILIZER
MODE
SELECT
CORRECTION LOGIC
OUTPUT BUFFERS
DCO
SCLK/DFS
SDIO/DCS
CSB
D11 (MSB)
D0 (LSB)
05492-
001
Figure 1.
The digital output data is presented in offset binary, Gray code, or
twos complement formats. A data output clock (DCO) is provided
to ensure proper latch timing with receiving logic.
The AD9233 is available in a 48-lead LFCSP and is specified
over the industrial temperature range (40°C to +85°C).
PRODUCT HIGHLIGHTS
1.
The AD9233 operates from a single 1.8 V power supply
and features a separate digital output driver supply to
accommodate 1.8 V to 3.3 V logic families.
2.
The patented SHA input maintains excellent performance
for input frequencies up to 225 MHz.
3.
The clock DCS maintains overall ADC performance over a
wide range of clock pulse widths.
4.
A standard serial port interface supports various product
features and functions, such as data formatting (offset
binary, twos complement, or Gray coding), enabling the
clock DCS, power-down, and voltage reference mode.
5.
The AD9233 is pin compatible with the AD9246, allowing
a simple migration from 12 bits to 14 bits.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9233BCPZRL7-125 | 功能描述:IC ADC 12BIT 125MSPS 48-LFCSP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:- 位数:14 采样率（每秒）:83k 数据接口:串行，并联 转换器数目:1 功率耗散（最大）:95mW 电压电源:双 ± 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:28-DIP（0.600"，15.24mm） 供应商设备封装:28-PDIP 包装:管件 输入数目和类型:1 个单端，双极 |
| AD9233BCPZRL7-80 | 制造商:AD 制造商全称:Analog Devices 功能描述:12-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Analog-to-Digital Converter |
| AD9234-1000EBZ | 功能描述:AD9234 - 12 Bit 1G Samples per Second Analog to Digital Converter (ADC) Evaluation Board 制造商:analog devices inc. 系列:- 零件状态:有效 A/D 转换器数:2 位数:12 采样率（每秒）:1G 数据接口:JESD204B 输入范围:1.34 Vpp 不同条件下的功率（典型值）:3W @ 1GSPS 使用的 IC/零件:AD9234 所含物品:板 标准包装:1 |
| AD9234BCPZ-1000 | 功能描述:IC ADC 12BIT 1GSPS 64LFCSP 制造商:analog devices inc. 系列:- 包装:托盘 零件状态:在售 位数:12 采样率（每秒）:1G 输入数:2 输入类型:差分 数据接口:JESD204B 配置:S/H-ADC 无线电 - S/H:ADC:1:1 A/D 转换器数:1 架构:管线 参考类型:内部 电压 - 电源，模拟:1.22 V ~ 1.28 V，2.44 V ~ 2.56 V 电压 - 电源，数字:1.22 V ~ 1.28 V 特性:- 工作温度:-40°C ~ 85°C 封装/外壳:64-WFQFN 裸露焊盘 供应商器件封装:64-LFCSP-WQ（9x9） 标准包装:1 |
| AD9234BCPZRL7-1000 | 功能描述:IC ADC 12BIT 1GSPS 64LFCSP 制造商:analog devices inc. 系列:- 包装:带卷（TR） 零件状态:在售 位数:12 采样率（每秒）:1G 输入数:2 输入类型:差分 数据接口:JESD204B 配置:S/H-ADC 无线电 - S/H:ADC:1:1 A/D 转换器数:1 架构:管线 参考类型:内部 电压 - 电源，模拟:1.22 V ~ 1.28 V，2.44 V ~ 2.56 V 电压 - 电源，数字:1.22 V ~ 1.28 V 特性:- 工作温度:-40°C ~ 85°C 封装/外壳:64-VFQFN 裸露焊盘，CSP 供应商器件封装:64-LFCSP-VQ（9x9） 标准包装:750 |
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