参数资料
型号: AD9244BSTZRL-65
厂商: Analog Devices Inc
文件页数: 13/36页
文件大小: 0K
描述: IC ADC 14BIT SGL 65MSPS 48LQFP
标准包装: 2,000
位数: 14
采样率(每秒): 65M
数据接口: 并联
转换器数目: 1
功率耗散(最大): 550mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-LQFP(7x7)
包装: 带卷 (TR)
输入数目和类型: 2 个单端,单极;1 个差分,单极
AD9244
Rev. C | Page 20 of 36
The circuit in Figure 47 shows a method for applying a differential,
direct-coupled signal to the AD9244. An AD8138 amplifier is used
to derive a differential signal from a single-ended signal.
REFT
REFB
AD9244
VIN+
AVDD
VIN–
33
Ω
20pF
0.1
μF
0.1
μF
0.1
μF
10
μF
33
Ω
+
499
Ω
499
Ω
499
Ω
AD8138
499
Ω
475
Ω
50
Ω
1k
Ω
1k
Ω
1V p-p
0V
10
μF
10
μF
10
μF
0.1
μF
0.1
μF
5V
02404-
047
+
Figure 47. Direct-Coupled Drive Circuit with AD8138 Differential Op Amp
REFERENCE OPERATION
The AD9244 contains a band gap reference that provides a pin-
strappable option to generate either a 1 V or 2 V output. With
the addition of two external resistors, the user can generate
reference voltages between 1 V and 2 V. Another alternative is
to use an external reference for designs requiring enhanced
accuracy and/or drift performance, as described later in this
section. Figure 48 shows a simplified model of the internal
voltage reference of the AD9244. A reference amplifier buffers a
1 V fixed reference. The output from the reference amplifier,
A1, appears on the VREF pin. As stated earlier, the voltage on
the VREF pin determines the full-scale differential input span
of the ADC.
TO
ADC
REFT
REFB
VREF
SENSE
REFGND
AD9244
2.5V
1V
LOGIC
DISABLE
A1
R
A1
02404-
048
A2
Figure 48. Equivalent Reference Circuit
The voltage appearing at the VREF pin and the state of the
internal reference amplifier, A1, are determined by the voltage
present at the SENSE pin. The logic circuitry contains compara-
tors that monitor the voltage at the SENSE pin. The various
reference modes are summarized in Table 9 and are described
in the next few sections.
The actual reference voltages used by the internal circuitry of
the AD9244 appear on the REFT and REFB pins. The voltages
on these pins are symmetrical about midsupply or CML. For
proper operation, it is necessary to add a capacitor network to
decouple these pins. Figure 49 shows the recommended
decoupling network. The turn-on time of the reference voltage
appearing between REFT and REFB is approximately 10 ms and
should be taken into consideration in any power-down mode of
operation. The VREF pin should be bypassed to the REFGND
pin with a 10 μF tantalum capacitor in parallel with a low
inductance 0.1 μF ceramic capacitor.
10
μF
0.1
μF
0.1
μF
0.1
μF
0.1
μF1
10
μF
VREF
REFT
REFB
AD9244
1LOCATE AS CLOSE AS POSSIBLE TO REFT/REFB PINS.
REFGND
+
02404-
049
Figure 49. Reference Decoupling
Pin-Programmable Reference
By shorting the VREF pin directly to the SENSE pin, the inter-
nal reference amplifier is placed in a unity gain mode, and the
resulting VREF output is 1 V. By shorting the SENSE pin directly to
the REFGND pin, the internal reference amplifier is configured
for a gain of 2, and the resulting VREF output is 2 V.
Resistor-Programmable Reference
Figure 50 shows an example of how to generate a reference
voltage other than 1.0 V or 2.0 V with the addition of two
external resistors. Use the equation
VREF = 1 V × (1 + R1/R2)
(5)
to determine the appropriate values for R1 and R2. These resistors
should be in the 2 kΩ to 10 kΩ range. For the example shown, R1
equals 2.5 kΩ and R2 equals 5 kΩ. From the previous equation, the
resulting reference voltage on the VREF pin is 1.5 V. This sets the
differential input span to 1.5 V p-p. The midscale voltage can also
be set to VREF by connecting VIN to VREF.
R1
2.5k
Ω
R2
5k
Ω
VREF
SENSE
AD9244
VIN+
VIN–
33
Ω
20pF
1.5V
33
Ω
REFGND
3.25V
1.75V
10
μF
0.1
μF
+
2.5V
02404-
050
REFT
REFB
0.1
μF
0.1
μF
0.1
μF
10
μF
+
Figure 50. Resistor-Programmable Reference
(1.5 V p-p Input Span, Differential Input with VCM = 2.5 V)
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