参数资料
型号: AD9244BSTZRL-65
厂商: Analog Devices Inc
文件页数: 35/36页
文件大小: 0K
描述: IC ADC 14BIT SGL 65MSPS 48LQFP
标准包装: 2,000
位数: 14
采样率(每秒): 65M
数据接口: 并联
转换器数目: 1
功率耗散(最大): 550mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-LQFP(7x7)
包装: 带卷 (TR)
输入数目和类型: 2 个单端,单极;1 个差分,单极
AD9244
Rev. C | Page 8 of 36
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
48
VR
47
VIN
46
VIN
+
45
CML
44
NIC
43
DCS
42
RE
FT
41
RE
FT
40
RE
FB
39
RE
FB
38
RE
FGND
37
VR
EF
35
DFS
34
AVDD
33
AGND
30
DGND
31
AVDD
32
AGND
36
SENSE
29
DRVDD
28
OTR
27
D13 (MSB)
25
D11
26
D12
2
AGND
3
AVDD
4
AVDD
7
CLK+
6
CLK–
5
AGND
1
AGND
8
NIC
9
OEB
10
D0 (LSB)
12
D2
11
D1
13
D3
14
DGND
15
DRV
DD
16
D4
17
D5
18
D6
19
D7
20
D8
21
D9
22
DGND
23
DRV
DD
24
D1
0
PIN 1
AD9244
TOP VIEW
(Not to Scale)
02404-003
Figure 3. Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 2, 5, 32, 33
AGND
Analog Ground.
3, 4, 31, 34
AVDD
Analog Supply Voltage.
6, 7
CLK–, CLK+
Differential Clock Inputs.
8, 44
NIC
No Internal Connection.
9
OEB
Digital Output Enable (Active Low).
10
D0 (LSB)
Least Significant Bit, Digital Output.
11 to 13,
16 to 21,
24 to 26
D1 to D3,
D4 to D9,
D10 to D12
Digital Outputs.
14, 22, 30
DGND
Digital Ground.
15, 23, 29
DRVDD
Digital Supply Voltage.
27
D13 (MSB)
Most Significant Bit, Digital Output.
28
OTR
Out-of-Range Indicator (Logic 1 Indicates OTR).
35
DFS
Data Format Select. Connect to AGND for straight binary, AVDD for twos complement.
36
SENSE
Internal Reference Control.
37
VREF
Internal Reference.
38
REFGND
Reference Ground.
39 to 42
REFB, REFT
Internal Reference Decoupling.
43
DCS
50% Duty Cycle Stabilizer. Connect to AVDD to activate 50% duty cycle stabilizer, AGND for
external control of both clock edges.
45
CML
Common-Mode Reference (0.5 × AVDD).
46, 47
VIN+, VIN–
Differential Analog Inputs.
48
VR
Internal Bias Decoupling.
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