参数资料
型号: AD9246BCPZRL7-125
厂商: Analog Devices Inc
文件页数: 1/44页
文件大小: 0K
描述: IC ADC 14BIT 125MSPS 48-LFCSP
设计资源: Using AD8376 to Drive Wide Bandwidth ADCs for High IF AC-Coupled Appls (CN0002)
Driving AD9233/46/54 ADCs in AC-Coupled Baseband Appls (CN0051)
标准包装: 750
位数: 14
采样率(每秒): 125M
数据接口: 串行,SPI?
转换器数目: 3
功率耗散(最大): 425mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-VFQFN 裸露焊盘,CSP
供应商设备封装: 48-LFCSP-VQ(7x7)
包装: 带卷 (TR)
输入数目和类型: 2 个单端,单极;1 个差分,单极
14-Bit, 80 MSPS/105 MSPS/125 MSPS,
1.8 V Analog-to-Digital Converter
AD9246
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2006 Analog Devices, Inc. All rights reserved.
FEATURES
1.8 V analog supply operation
1.8 V to 3.3 V output supply
SNR = 71.7 dBc (72.7 dBFS) to 70 MHz input
SFDR = 85 dBc to 70 MHz input
Low power: 395 mW @ 125 MSPS
Differential input with 650 MHz bandwidth
On-chip voltage reference and sample-and-hold amplifier
DNL = ±0.4 LSB
Flexible analog input: 1 V p-p to 2 V p-p range
Offset binary, Gray code, or twos complement data format
Clock duty cycle stabilizer
Data output clock
Serial port control
Built-in selectable digital test pattern generation
Programmable clock and data alignment
APPLICATIONS
Ultrasound equipment
IF sampling in communications receivers
IS-95, CDMA-One, IMT-2000
Battery-powered instruments
Hand-held scopemeters
Low cost digital oscilloscopes
GENERAL DESCRIPTION
The AD9246 is a monolithic, single 1.8 V supply, 14-bit, 80 MSPS/
105 MSPS/125 MSPS analog-to-digital converter (ADC), featuring
a high performance sample-and-hold amplifier (SHA) and on-chip
voltage reference. The product uses a multistage differential
pipeline architecture with output error correction logic to
provide 14-bit accuracy at 125 MSPS data rates and guarantees
no missing codes over the full operating temperature range.
The wide bandwidth, truly differential SHA allows a variety of
user-selectable input ranges and offsets, including single-ended
applications. It is suitable for multiplexed systems that switch
full-scale voltage levels in successive channels and for sampling
single-channel inputs at frequencies well beyond the Nyquist rate.
Combined with power and cost savings over previously available
ADCs, the AD9246 is suitable for applications in communications,
imaging, and medical ultrasound.
A differential clock input controls all internal conversion cycles.
A duty cycle stabilizer (DCS) compensates for wide variations in
the clock duty cycle while maintaining excellent overall ADC
performance.
FUNCTIONAL BLOCK DIAGRAM
DRVDD
AVDD
AGND
0.5V
CLK–
PDWN DRGND
OR
VIN+
VIN–
REFT
REFB
AD9246
VREF
SENSE
SHA
A/D
MDAC1
4
8
15
3
A/D
8-STAGE
1 1/2-BIT PIPELINE
REF
SELECT
CLK+
CLOCK
DUTY CYCLE
STABILIZER
MODE
SELECT
CORRECTION LOGIC
OUTPUT BUFFERS
DCO
SCLK/DFS
SDIO/DCS
CSB
D13 (MSB)
D0 (LSB)
05491-
0
01
Figure 1.
The digital output data is presented in offset binary, Gray code, or
twos complement formats. A data output clock (DCO) is provided
to ensure proper latch timing with receiving logic.
The AD9246 is available in a 48-lead LFCSP_VQ and is specified
over the industrial temperature range (40°C to +85°C).
PRODUCT HIGHLIGHTS
1.
The AD9246 operates from a single 1.8 V power supply
and features a separate digital output driver supply to
accommodate 1.8 V to 3.3 V logic families.
2.
The patented SHA input maintains excellent performance
for input frequencies up to 225 MHz.
3.
The clock DCS maintains overall ADC performance over a
wide range of clock pulse widths.
4.
A standard serial port interface supports various product
features and functions, such as data formatting (offset
binary, twos complement, or Gray coding), enabling the
clock DCS, power-down, and voltage reference mode.
5.
The AD9246 is pin-compatible with the AD9233, allowing
a simple migration from 12 bits to 14 bits.
相关PDF资料
PDF描述
MS27473T12C98S CONN PLUG 10POS STRAIGHT W/SCKT
MS27497T24F61S CONN RCPT 61POS WALL MNT W/SCKT
VI-2VV-MY CONVERTER MOD DC/DC 5.8V 50W
VI-2VT-MY CONVERTER MOD DC/DC 6.5V 50W
VI-B03-MY CONVERTER MOD DC/DC 24V 50W
相关代理商/技术参数
参数描述
AD9246BCPZRL7-80 制造商:Analog Devices 功能描述:14-BIT, 80 MSPS/105 MSPS/125 MSPS, 1.8 V ANALOG-TO-DIGITAL C - Tape and Reel
AD9248 制造商:Analog Devices 功能描述:40 MSPS DUAL A/D CONVERTER - Bulk
AD9248-20PCB 制造商:AD 制造商全称:Analog Devices 功能描述:14-Bit, 20/40/65 MSPS Dual A/ D Converter
AD9248-40PCB 制造商:AD 制造商全称:Analog Devices 功能描述:14-Bit, 20/40/65 MSPS Dual A/ D Converter
AD9248-65PCB 制造商:AD 制造商全称:Analog Devices 功能描述:14-Bit, 20/40/65 MSPS Dual A/ D Converter