参数资料
型号: AD9512/PCBZ
厂商: Analog Devices Inc
文件页数: 10/48页
文件大小: 0K
描述: BOARD EVAL FOR AD9512
设计资源: AD9512 Eval Brd BOM
AD9511/12 All Layers
AD9511/12 Schematics
AD9511/12 Gerber Files
标准包装: 1
主要目的: 计时,时钟分配
已用 IC / 零件: AD9512
已供物品:
AD9512
Rev. A | Page 18 of 48
Table 11. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
DSYNC
Detect Sync. Used for multichip synchronization.
2
DSYNCB
Detect Sync Complement. Used for multichip synchronization.
3, 4, 6, 9, 18,
22, 23, 25, 28,
29, 32, 33, 36,
39, 40, 44, 47, 48
VS
Power Supply (3.3 V).
5
DNC
Do Not Connect.
7
CLK2
Clock Input.
8
CLK2B
Complementary Clock Input. Used in conjunction with CLK2.
10
CLK1
Clock Input.
11
CLK1B
Complementary Clock Input. Used in conjunction with CLK1.
12
FUNCTION
Multipurpose Input. Can be programmed as a reset (RESETB), sync (SYNCB), or power-down (PDB) pin.
13
STATUS
Output Used to Monitor the Status of Multichip Synchronization.
14
SCLK
Serial Data Clock.
15
SDIO
Serial Data I/O.
16
SDO
Serial Data Output.
17
CSB
Serial Port Chip Select.
19, 24, 37,
38, 43, 46
GND
Ground.
20
OUT2B
Complementary LVPECL Output.
21
OUT2
LVPECL Output.
26
OUT1B
Complementary LVPECL Output.
27
OUT1
LVPECL Output.
30
OUT4B
Complementary LVDS/Inverted CMOS Output. OUT4 includes a delay block.
31
OUT4
LVDS/CMOS Output. OUT4 includes a delay block.
34
OUT3B
Complementary LVDS/Inverted CMOS Output.
35
OUT3
LVDS/CMOS Output.
41
OUT0B
Complementary LVPECL Output.
42
OUT0
LVPECL Output.
45
RSET
Current Set Resistor to Ground. Nominal value = 4.12 kΩ.
Note that the exposed paddle on this package is an electrical connection as well as a thermal enhancement. For the device to
function properly, the paddle must be attached to ground, GND.
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