参数资料
型号: AD9513BCPZ
厂商: Analog Devices Inc
文件页数: 17/28页
文件大小: 0K
描述: IC CLOCK DIST 3OUT PLL 32LFCSP
标准包装: 1
类型: 扇出缓冲器(分配),除法器
PLL:
输入: 时钟
输出: CMOS,LVDS
电路数: 1
比率 - 输入:输出: 1:3
差分 - 输入:输出: 是/是
频率 - 最大: 800MHz
除法器/乘法器: 是/无
电源电压: 3.135 V ~ 3.465 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘,CSP
供应商设备封装: 32-LFCSP-VQ(5x5)
包装: 托盘
产品目录页面: 776 (CN2011-ZH PDF)
配用: AD9513/PCBZ-ND - BOARD EVAL FOR AD9513
AD9513
Rev. 0 | Page 24 of 28
Termination at the far end of the PCB trace is a second option.
The CMOS outputs of the AD9513 do not supply enough
current to provide a full voltage swing with a low impedance
resistive, far-end termination, as shown in Figure 32. The
far-end termination network should match the PCB trace
impedance and provide the desired switching point. The
reduced signal swing may still meet receiver input requirements
in some applications. This can be useful when driving long
trace lengths on less critical nets.
50
10
OUT1/OUT1B
SELECTED AS CMOS
VS
CMOS
3pF
100
05
595
-0
34
Figure 32. CMOS Output with Far-End Termination
Because of the limitations of single-ended CMOS clocking,
consider using differential outputs when driving high speed
signals over long traces. The AD9513 offers LVDS outputs that
are better suited for driving long traces where the inherent noise
immunity of differential signaling provides superior
performance for clocking converters.
SETUP PINS (S0 TO S10)
The setup pins that require a logic level of VS (internal self-
bias) should be tied together and bypassed to ground via a
capacitor.
The setup pins that require a logic level of VS should be tied
together, along with the VREF pin, and bypassed to ground via
a capacitor.
POWER AND GROUNDING CONSIDERATIONS AND
POWER SUPPLY REJECTION
Many applications seek high speed and performance under less
than ideal operating conditions. In these application circuits, the
implementation and construction of the PCB is as important
as the circuit design. Proper RF techniques must be used for
device selection, placement, and routing, as well as power
supply bypassing and grounding to ensure optimum
performance.
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