参数资料
| 型号： | AD9518-3ABCPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 15/64页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK GEN 6CH 2GHZ 48LFCSP |
| 标准包装： | 1 |
| 类型： | 时钟发生器，扇出配送 |
| PLL： | 是 |
| 输入： | CMOS，LVDS，LVPECL |
| 输出： | LVPECL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:6 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 2.25GHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 48-LFCSP-VQ（7x7） |
| 包装： | 托盘 |
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AD9518-3
Data Sheet
Rev. B | Page 22 of 64
THEORY OF OPERATION
OPERATIONAL CONFIGURATIONS
The AD9518 can be configured in several ways. These
configurations must be set up by loading the control registers
or function must be individually programmed by setting the
appropriate bits in the corresponding control register or registers.
High Frequency Clock Distribution—CLK or External
VCO > 1600 MHz
The AD9518 power-up default configuration has the PLL
powered off and the routing of the input set so that the CLK/CLK
input is connected to the distribution section through the VCO
divider (divide-by-2/divide-by-3/divide-by-4/ divide-by-5/divide-
by-6). This is a distribution-only mode that allows for an external
input up to 2.4 GHz (see
). The maximum frequency that
can be applied to the channel dividers is 1600 MHz; therefore,
higher input frequencies must be divided down before reaching
the channel dividers. This input routing can also be used for lower
input frequencies, but the minimum divide is 2 before the channel
dividers.
When the PLL is enabled, this routing also allows the use of the
PLL with an external VCO or VCXO with a frequency of less than
2400 MHz. In this configuration, the internal VCO is not used
and is powered off. The external VCO/VCXO feeds directly into
the prescaler.
The register settings shown in Table 20 are the default values
of these registers at power-up or after a reset operation. If the
contents of the registers are altered by prior programming after
power-up or reset, these registers can also be set intentionally to
these values.
After the appropriate register values are programmed,
Register 0x232 must be set to 0x01 for the values to take effect.
Table 20. Default Settings of Some PLL Registers
Register
Function
0x010[1:0] = 01b
PLL asynchronous power-down (PLL off ).
0x1E0[2:0] = 010b
Set VCO divider = 4.
0x1E1[0] = 0b
Use the VCO divider.
0x1E1[1] = 0b
CLK selected as the source.
When using the internal PLL with an external VCO, the PLL
must be turned on.
Table 21. Settings When Using an External VCO
Register
Function
0x010[1:0] = 00b
PLL normal operation (PLL on).
0x010 to 0x01D
PLL settings. Select and enable a reference
input; set R, N (P, A, B), PFD polarity, and ICP,
according to the intended loop configuration.
0x1E1[1] = 0b
CLK selected as the source.
An external VCO requires an external loop filter that must be
connected between CP and the tuning pin of the VCO. This
loop filter determines the loop bandwidth and stability of the
PLL. Make sure to select the proper PFD polarity for the VCO
being used.
Table 22. Setting the PFD Polarity
Register
Function
0x010[7] = 0b
PFD polarity positive (higher control voltage
produces higher frequency).
0x010[7] = 1b
PFD polarity negative (higher control
voltage produces lower frequency).
相关PDF资料 |
PDF描述 |
|---|---|
| AD9518-4ABCPZ-RL7 | IC CLOCK GEN 6CH 1.8GHZ 48LFCSP |
| AD9520-0BCPZ-REEL7 | IC CLOCK GEN 2.8GHZ VCO 64LFCSP |
| AD9520-1BCPZ | IC CLOCK GEN 2.5GHZ VCO 64LFCSP |
| AD9520-2BCPZ | IC CLOCK GEN 2.2GHZ VCO 64LFCSP |
| AD9520-3BCPZ-REEL7 | IC CLOCK GEN 2GHZ VCO 64LFCSP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9518-3ABCPZ-RL7 | 功能描述:IC CLOCK GEN 6CH 2GHZ 48LFCSP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:2,000 系列:- 类型:PLL 时钟发生器 PLL:带旁路 输入:LVCMOS，LVPECL 输出:LVCMOS 电路数:1 比率 - 输入:输出:2:11 差分 - 输入:输出:是/无 频率 - 最大:240MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:32-LQFP 供应商设备封装:32-TQFP（7x7） 包装:带卷 (TR) |
| AD9518-3A-PCBZ | 制造商:AD 制造商全称:Analog Devices 功能描述:6-Output Clock Generator with 6-Output Clock Generator with |
| AD9518-3BCPZ | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD9518-3BCPZ-REEL7 | 制造商:Analog Devices 功能描述:Clock Generator 48-Pin LFCSP EP T/R |
| AD9518-4 | 制造商:AD 制造商全称:Analog Devices 功能描述:6-Output Clock Generator with Integrated 1.6 GHz VCO |
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