参数资料
| 型号： | AD9726BSVZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 16/24页 |
| 文件大小： | 0K |
| 描述： | IC DAC 16IT LVDS 400MSPS 80-TQFP |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 标准包装： | 1 |
| 系列： | TxDAC+® |
| 位数： | 16 |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 电压电源： | 模拟和数字 |
| 功率耗散（最大）： | 575mW |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 80-TQFP 裸露焊盘 |
| 供应商设备封装： | 80-TQFP-EP（12x12） |
| 包装： | 托盘 |
| 输出数目和类型： | 2 电流，单极 |
| 采样率（每秒）： | 400M |
| 产品目录页面： | 785 (CN2011-ZH PDF) |
| 配用： | AD9726-EBZ-ND - BOARD EVAL FOR AD9726 |
AD9726
Rev. B | Page 23 of 24
sync logic should be resynchronized by asserting SYNCUPD
at the next convenient time.
In manual mode, users can choose when to update the sync
logic. When operating with burst data, issuing a sync update
between active bursts updates the system without risking the
loss of any data. In fact, because SYNCUPD always forces a
resynchronization regardless of operational mode, even users in
fully automatic mode can reduce the possibility of data loss by
occasionally forcing a sync update during idle activity.
If either the data clock or the DAC clock is interrupted for any
reason, a SYNCUPD should always be executed to ensure that
data bus and DAC clock phase alignment remains optimized.
SYNC External Mode
Going beyond manual mode, sync external mode offers a
greater level of control and can be useful if multiple DAC
channels are employed in an application. Enable sync external
mode by asserting the SYNCEXT bit (Bit 5) in SPI Register
0x16. Manual mode must also be enabled.
The four channels into which each incoming data-word is
multiplexed are called quadrants. In any mode, the current
quadrant value can always be read back via SYNCOUT (Bits
[1:0] of SPI Register 0x15). At sync update, the logic chooses the
optimal quadrant and refreshes the value of SYNCOUT.
It is also possible to enter a value into SYNCIN (Bits [4:3] of SPI
Register 0x16). When external mode is enabled, the logic oper-
ates as expected, except that the quadrant value in SYNCIN is
used following an update. This can be used to align delays
between multiple device outputs.
Operating With SPI Disabled
If the SPI_DIS pin is connected high to ADVDD and the SPI is
disabled, the sync logic is placed into manual mode.
SYNCALRM status can then be monitored in hardware via the
unused SPI pin SDO (54), and SYNCUPD requests can be
entered in hardware via the unused SPI pin SCLK (56). If these
two pins are connected together, fully automatic sync operation
can be achieved.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9726BSVZRL | 功能描述:IC DAC 16IT LVDS 400MSPS 80-TQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:TxDAC+® 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1,000 系列:- 设置时间:1µs 位数:8 数据接口:串行 转换器数目:8 电压电源:双 ± 功率耗散（最大）:941mW 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:24-SOIC（0.295"，7.50mm 宽） 供应商设备封装:24-SOIC W 包装:带卷 (TR) 输出数目和类型:8 电压，单极 采样率（每秒）:* |
| AD9726-EB | 制造商:Analog Devices 功能描述:EVAL FOR AD9726 - Bulk |
| AD9726-EBZ | 功能描述:BOARD EVAL FOR AD9726 RoHS:是 类别:编程器，开发系统 >> 评估板 - 数模转换器 (DAC) 系列:TxDAC+® 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- DAC 的数量:4 位数:12 采样率（每秒）:- 数据接口:串行，SPI? 设置时间:3µs DAC 型:电流/电压 工作温度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD972A | 制造商:Analog Devices 功能描述:- Bulk |
| AD9731 | 制造商:AD 制造商全称:Analog Devices 功能描述:10-Bit, 170 MSPS D/A Converter |
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