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参数资料
| 型号： | AD9880/PCBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 33/64页 |
| 文件大小： | 0K |
| 描述： | KIT EVALUATION AD9880 |
| 标准包装： | 1 |
| 系列： | Advantiv® |
| 主要目的： | 视频，视频处理 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | AD9880 |
| 主要属性： | 模拟和 HDMI/DVI 双路显示器端口 |
| 次要属性： | 自动偏移，色域转换器，RGB 和 YCbCr 输出格式 |
| 已供物品： | 板 |
| 相关产品： | AD9880KSTZ-150-ND - IC INTERFACE/HDMI 150MHZ 100LQFP AD9880KSTZ-100-ND - IC INTERFACE/HDMI 100MHZ 100LQFP |
| 其它名称： | Q5281026 |
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AD9880
Rev. 0 | Page 39 of 64
0x0D
7-0
Blue Channel Offset
These eight bits are the blue channel offset control.
The offset control shifts the analog input, resulting in
a change in brightness. Note that the function of the
offset register depends on whether clamp feedback is
enabled (Register 0x1C, Bit 7 = 1).
If clamp feedback is disabled, the offset register bits
control the absolute offset added to the channel. The
offset control provides a +127/128 LSBs of adjust-
ment range, with 1 LSB of offset corresponding to
1 LSB of output code. If clamp feedback is enabled
these bits provide the relative offset (brightness) from
the offset adjust in the previous register. The power-up
default is 0x80.
SYNC
0x0E
7-0
Sync Separator
Selects the max Hsync pulse width for composite sync
separation. Power-down default is 0x20.
0x0F
7-2
SOG Comparator Threshold Enter
The enter level for the SOG slicer. Must be < than exit
level (Register 0x10). The power-up default is 0x10.
0x10
7-2
SOG Comparator Threshold Exit
The exit level for the SOG slicer. Must be > enter level
(Register 0x0F). The power-up default is 0x10.
0x11
7
Hsync Source
0 = Hsync, 1 = SOG. The power-up default is 0. These
selections are ignored if Register 0x11, Bit 6 = 0.
0x11
6
Hsync Source Override
0 = auto Hsync source, 1 = manual Hsync source.
Manual Hsync source is defined in Register 0x11,
Bit 7. The power-up default is 0.
0x11
5
Vsync Source
0 = Vsync, 1 = Vsync from SOG. The power-up
default is 0. These selections are ignored if Register
0x11, Bit 4 = 0.
0x11
4
Vsync Source Override
0 = auto Vsync source, 1 = MANUAL Vsync source.
Manual Vsync source is defined in Register 0x11,
Bit 5. The power-up default is 0.
0x11
3
Channel Select
0 = Channel 0, 1 = Channel 1. The power-up default is
0. These selections are ignored if Register 0x11,
Bit 2 = 0.
0x11
2
Channel Select Override
0 = auto channel select, 1 = manual channel select.
Manual channel select is defined in Register 0x11,
Bit 3. The power-up default is 0.
0x11
1
Interface Select
0 = analog interface, 1 = digital interface. The power-
up default is 0. These selections are ignored if
Register 0x11, Bit 0 = 0.
0x11
0
Interface Select Override
0 = auto interface select, 1 = manual interface select.
Manual interface select is defined in Register 0x11,
Bit 1. The power-up default is 0.
0x12
7
Input Hsync Polarity
0 = active low, 1 = active high. The power-up default is
1. These selections are ignored if Register 10x2,
Bit 6 = 0.
0x12
6
Hsync Polarity Override
0 = auto Hsync polarity, 1 = manual Hsync polarity.
Manual Hsync polarity is defined in Register 0x11,
Bit 7. The power-up default is 0.
0x12
5
Input Vsync Polarity
0 = active low, 1 = active high. The power-up default is
1. These selections are ignored if Register 0x11,
Bit 4 = 0.
0x12
4
Vsync Polarity Override
0 = auto Vsync polarity, 1 = manual Vsync polarity.
Manual Vsync polarity is defined in Register 0x11,
Bit 5. The power-up default is 0.
COAST AND CLAMP CONTROLS
0x12
3
Input Coast Polarity
0 = active low, 1 = active high. The power-up default
is 1.
0x12
2
Coast Polarity Override
0 = auto Coast polarity, 1 = manual Coast polarity.
The power-up default is 0.
0x12
1
Coast Source
0 = internal Coast, 1 = external Coast. The power-up
default is 0.
0x12
0
Filter Coast Vsync
0 = use raw Vsync for Coast generation, 1 = use
filtered Vsync for Coast generation The power-up
default is 1.
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相关代理商/技术参数 |
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|---|---|
| AD9880XSTZ-100 | 制造商:Analog Devices 功能描述:IC, ANALOG/HDMI DUAL DISPLAY INTERFACE, PQFP100 |
| AD9882 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual Interface for Flat Panel Displays |
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