参数资料
| 型号： | AD9949KCPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 3/36页 |
| 文件大小： | 0K |
| 描述： | IC CCD SIGNAL PROCESSOR 40-LFCSP |
| 标准包装： | 1 |
| 类型： | CCD 信号处理器，12 位 |
| 输入类型： | 逻辑 |
| 输出类型： | 逻辑 |
| 接口： | 3 线串口 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 40-LFCSP |
| 包装： | 托盘 |
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AD9949
Rev. B | Page 11 of 36
SYSTEM OVERVIEW
CCD
SERIAL
INTERFACE
DOUT
DIGITAL IMAGE
PROCESSING
ASIC
V-DRIVER
HD, VD
CLI
V1 TO Vx, VSG1 TO VSGx, SUBCK
H1 TO H4, RG
CCDIN
AD9949
INTEGRATED
AFE + TD
03751-
012
Figure 11. Typical Application
Figure 11 shows the typical system application diagram for the
AD9949. The CCD output is processed by the AD9949’s AFE
circuitry, which consists of a CDS, a PxGA, a VGA, a black level
clamp, and an ADC. The digitized pixel information is sent to
the digital image processor chip where all postprocessing and
compression occurs. To operate the CCD, CCD timing
parameters are programmed into the AD9949 from the image
processor through the 3-wire serial interface. From the system
master clock, CLI, provided by the image processor, the
AD9949 generates the high speed CCD clocks and all internal
AFE clocks. All AD9949 clocks are synchronized with VD and
HD. The AD9949’s horizontal pulses (CLPOB, PBLK, and
HBLK) are programmed and generated internally.
The H-drivers for H1 to H4 and RG are included in the
AD9949, allowing these clocks to be directly connected to the
CCD. The H-drive voltage of 3 V is supported in the AD9949.
Figure 12 shows the horizontal and vertical counter dimensions
for the AD9949. All internal horizontal clocking is programmed
using these dimensions to specify line and pixel locations.
H-COUNTER BEHAVIOR
When the maximum horizontal count of 4096 pixels is
exceeded, the H-counter in the AD9949 rolls over to zero and
continues counting. It is, therefore, recommended that the
maximum counter value not be exceeded.
However, the newer AD9949A version behaves differently. In
the AD9949A, the internal H-counter holds at its maximum
count of 4095 instead of rolling over. This feature allows the
AD9949A to be used in applications containing a line length
greater than 4096 pixels. Although no programmable values for
the horizontal blanking or clamping are available beyond pixel
4095, the H, RG, and AFE clocking continues to operate,
sampling the remaining pixels on the line.
MAXIMUM FIELD DIMENSIONS
12-BIT HORIZONTAL = 4096 PIXELS MAX
12-BIT VERTICAL = 4096 LINES MAX
03751-013
Figure 12. Vertical and Horizontal Counters
VD
HD
CLI
MAX HD LENGTH IS 4095 PIXELS
03751-014
MAX VD LENGTH IS 4095 LINES
Figure 13. Maximum VD/HD Dimensions
相关PDF资料 |
PDF描述 |
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| AD9951YSVZ | IC DDS DAC 14BIT 1.8V 48-TQFP |
| AD9952YSVZ-REEL7 | IC DDS DAC 14BIT 1.8V 48TQFP |
| AD9953YSVZ-REEL7 | IC DDS DAC 14BIT 1.8V 48TQFP |
| AD9954YSVZ-REEL7 | IC DDS DAC 14BIT 1.8V 48TQFP |
| AD9956YCPZ-REEL7 | IC SYNTHESIZER 1.8V 48LFCSP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9949KCPZRL | 功能描述:IC CCD SIGNAL PROCESSOR 40-LFCSP RoHS:是 类别:集成电路 (IC) >> 接口 - 传感器和探测器接口 系列:- 其它有关文件:Automotive Product Guide 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:74 系列:- 类型:触控式传感器 输入类型:数字 输出类型:数字 接口:JTAG，串行 电流 - 电源:100µA 安装类型:表面贴装 封装/外壳:20-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:20-TSSOP 包装:管件 |
| AD9950KJ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Parallel-Input Frequency Synthesizer |
| AD9950TJ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Parallel-Input Frequency Synthesizer |
| AD9951 | 制造商:AD 制造商全称:Analog Devices 功能描述:400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer |
| AD9951/PCBZ | 制造商:Analog Devices 功能描述:AD9951 400 MSPS DDS W/ 14 BIT DAC EVALBD - Boxed Product (Development Kits) |
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