参数资料
型号: AD9957BSVZ-REEL
厂商: Analog Devices Inc
文件页数: 41/64页
文件大小: 0K
描述: IC DDS 1GSPS 14BIT IQ 100TQFP
产品培训模块: Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
标准包装: 1,000
分辨率(位): 14 b
主 fclk: 1GHz
调节字宽(位): 32 b
电源电压: 1.8V, 3.3V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 100-TQFP 裸露焊盘
供应商设备封装: 100-TQFP-EP(14x14)
包装: 带卷 (TR)
配用: AD9957/PCBZ-ND - BOARD EVAL AD9957 QUADRATURE MOD
AD9957
Data Sheet
Rev. C | Page 46 of 64
POWER SUPPLY PARTITIONING
The AD9957 features multiple power supplies, and their power
consumption varies with its configuration. This section covers
which power supplies can be grouped together and how the
power consumption of each block varies with frequency.
The values quoted in this section are for comparison only. Refer
to Table 1 for exact values. With each group, bypass capacitors of
1 μF in parallel with a 10 μF capacitor should be used.
The recommendations here are for typical applications, for
which there are four groups of power supplies: 3.3 V digital,
3.3 V analog, 1.8 V digital, and 1.8 V analog.
Applications demanding the highest performance may require
additional power supply isolation.
3.3 V SUPPLIES
DVDD_I/O (Pin 11, Pin 15, Pin 21, Pin 28, Pin 45, Pin 56,
Pin 66)
These 3.3 V supplies can be grouped together. The power
consumption on these pins varies dynamically with serial port
activity.
AVDD (Pin 74 to Pin 77 and Pin 83)
These are 3.3 V DAC power supplies that typically consume
about 28 mA. At a minimum, a ferrite bead should be used to
isolate these from other 3.3 V supplies, with a separate regulator
being ideal. The current consumption of these supplies consist
mainly of biasing current and do not vary with frequency.
1.8 V SUPPLIES
DVDD (Pin 17, Pin 23, Pin 30, Pin 47, Pin 57, Pin 64)
These pins can be grouped together. Their current consumption
increases linearly with the system clock frequency. A system
clock of 1 GHz produces a typically current consumption of
610 mA in QDUC mode. There is also a slight (~5%) increase
as fOUT increases from 50 MHz to 400 MHz.
AVDD (Pin 3)
This 1.8 V supply powers the REFCLK multiplier (PLL) and
consumes about 7 mA. For applications demanding the highest
performance with the PLL enabled, this supply should be
isolated from other 1.8 V AVDD supplies with a separate
regulator. For less demanding applications this supply can be
run off the same regulator as Pin 89, Pin 92 with a ferrite bead
to isolate Pin 3 from Pin 89, and Pin 89.
The loop filter for the PLL should directly connect to Pin 3. If
the PLL is bypassed, pin 3 should still be powered, but isolation
is not critical.
AVDD (Pin 6)
This pin can be grouped together with the DVDD 1.8V supply
pins. For the highest performance, a ferrite bead should be used
for isolation, with a separate regulator being ideal.
AVDD (Pin 89 and Pin 92)
This 1.8 V supply for the REFCLK input consumes about
15 mA. The supply can be run off the same as Pin 3 with a
ferrite bead to isolate Pin 3 from Pin 89 and Pin 92. At a
minimum, a ferrite bead should be used to isolate these from
other 1.8 V supplies. However, for applications demanding the
highest performance, a separate regulator is recommended.
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