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| 型号： | ADF4350BCPZ-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 20/32页 |
| 文件大小： | 0K |
| 描述： | IC SYNTH PLL VCO FN/IN 32LFCSP |
| 产品变化通告： | ADF4350, ADF4905/6 N-counter Change 05/Mar/2012 |
| 设计资源： | Broadband Low EVM Direct Conversion Transmitter (CN0134) Broadband Low EVM Direct Conversion Transmitter Using LO Divide-by-2 Modulator (CN0144) Using low noise linear drop-out regulators to power wideband PLL & VCO IC's (CN0147) |
| 标准包装： | 5,000 |
| 类型： | 扇出配送，分数-N，整数-N，时钟/频率合成器（RF） |
| PLL： | 是 |
| 输入： | CMOS，TTL |
| 输出： | 时钟 |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:3 |
| 差分 - 输入:输出： | 无/无 |
| 频率 - 最大： | 4.4GHz |
| 除法器/乘法器： | 是/是 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 32-LFCSP-VQ（5x5） |
| 包装： | 带卷 (TR) |
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ADF4350
Rev. A | Page 27 of 32
Table 7. Matching Components
OUTPUT MATCHING
Frequency Range (MHz)
L (nH)
C (nF)
137.5 to 500
100
1
500 to 1000
47
1
1000 to 2000
7.5
1
2000 to 4400
3.9
1
There are a number of ways to match the output of the ADF4350
for optimum operation; the most basic is to use a 50 Ω resistor to
VVCO. A dc bypass capacitor of 100 pF is connected in series as
shown in Figure 37. Because the resistor is not frequency
dependent, this provides a good broadband match. Placing
the output power in this circuit into a 50 Ω load typically
gives values chosen by Bit D2 and Bit D1 in Register 4 (R4).
If differential outputs are not required, the unused output can
be terminated or both outputs can be combined using a balun.
Unused terminated outputs should have the same shunt and
series components and a load resistor to GND. If the auxiliary
output is unused (disabled in software), then the RFOUTB± pins
can be left open circuit.
100pF
0
73
25-
0
21
RFOUT
VVCO
50
L1
C1
50
RFOUTA+
RFOUTA–
VVCO
C2
L2
0
732
5-
1
32
Figure 37. Simple ADF4350 Output Stage
A better solution is to use a shunt inductor (acting as an RF
choke) to VVCO. This gives a better match and, therefore, more
output power.
Experiments have shown the circuit shown in Figure 38
provides an excellent match to 50 Ω for the W-CDMA UMTS
Band 1 (2110 MHz to 2170 MHz). The maximum output power
in that case is about 5 dBm. Both single-ended architectures can
be examined using the EVAL-ADF4350EB1Z evaluation board.
Table 7 provides a suggested range of values for the capacitor
and choke inductor for different frequency ranges.
Figure 39. ADF4350 LC Balun
A balun using discrete inductors and capacitors may be
implemented with the architecture in Figure 39.
Component L1 and Component C1 comprise the LC balun, L2
provides a dc path for RFOUTA, and Capacitor C2 is used for dc
blocking. better solution is to use a shunt inductor (acting as an
RF choke) to VVCO. This gives a better match and, therefore,
more output power.
L
C
07
32
5-
0
25
RFOUT
VVCO
50
Experiments have shown the circuit shown in Figure 38
provides an excellent match to 50 Ω for the W-CDMA UMTS
Band 1 (2110 MHz to 2170 MHz). The maximum output power
in that case is about 5 dBm. Both single-ended architectures can
be examined using the EVAL-ADF4350EB1Z evaluation board.
Figure 38.Optimum ADF4350 Output Stage
S11 parameters are provided in Table
Table
8. LC Balun Components
Frequency
Range (MHz)
Inductor L1 (nH)
Capacitor C1 (pF)
RF Choke
Inductor (nH)
DC Blocking
Capacitor (pF)
Measured Output
Power (dBm)
137 to 300
100
10
390
1000
9
300 to 460
51
5.6
180
120
10
400 to 600
30
5.6
120
10
600 to 900
18
4
68
120
10
860 to 1240
12
2.2
39
10
9
1200 to 1600
5.6
1.2
15
10
9
1600 to 3600
3.3
0.7
10
8
2800 to 3800
2.2
0.5
10
8
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADF4350BCPZ-RL7 | 功能描述:IC SYNTH PLL VCO FN/IN 32LFCSP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:2,000 系列:- 类型:PLL 频率合成器 PLL:是 输入:晶体 输出:时钟 电路数:1 比率 - 输入:输出:1:1 差分 - 输入:输出:无/无 频率 - 最大:1GHz 除法器/乘法器:是/无 电源电压:4.5 V ~ 5.5 V 工作温度:-20°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-LSSOP（0.175"，4.40mm 宽） 供应商设备封装:16-SSOP 包装:带卷 (TR) 其它名称:NJW1504V-TE1-NDNJW1504V-TE1TR |
| ADF4350BCPZ-U6 | 制造商:Analog Devices 功能描述: |
| ADF4350EB1Z | 制造商:Analog Devices 功能描述:AD EVAL BOARD - Bulk |
| ADF4351 | 制造商:AD 制造商全称:Analog Devices 功能描述:Wideband Synthesizer |
| ADF4351BCPZ | 功能描述:IC SYNTH PLL VCO 32LFCSP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:2,000 系列:- 类型:PLL 时钟发生器 PLL:带旁路 输入:LVCMOS，LVPECL 输出:LVCMOS 电路数:1 比率 - 输入:输出:2:11 差分 - 输入:输出:是/无 频率 - 最大:240MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:32-LQFP 供应商设备封装:32-TQFP（7x7） 包装:带卷 (TR) |
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