参数资料
型号: ADF4350BCPZ-RL
厂商: Analog Devices Inc
文件页数: 31/32页
文件大小: 0K
描述: IC SYNTH PLL VCO FN/IN 32LFCSP
产品变化通告: ADF4350, ADF4905/6 N-counter Change 05/Mar/2012
设计资源: Broadband Low EVM Direct Conversion Transmitter (CN0134)
Broadband Low EVM Direct Conversion Transmitter Using LO Divide-by-2 Modulator (CN0144)
Using low noise linear drop-out regulators to power wideband PLL & VCO IC's (CN0147)
标准包装: 5,000
类型: 扇出配送,分数-N,整数-N,时钟/频率合成器(RF)
PLL:
输入: CMOS,TTL
输出: 时钟
电路数: 1
比率 - 输入:输出: 1:3
差分 - 输入:输出: 无/无
频率 - 最大: 4.4GHz
除法器/乘法器: 是/是
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘,CSP
供应商设备封装: 32-LFCSP-VQ(5x5)
包装: 带卷 (TR)
ADF4350
Rev. A | Page 8 of 32
Pin No.
Mnemonic
Description
22
RSET
Connecting a resistor between this pin and GND sets the charge pump output current. The nominal voltage
bias at the RSET pin is 0.55 V. The relationship between ICP and RSET is
SET
CP
R
25.5
I
=
where:
RSET = 5.1 kΩ
ICP = 5 mA
23
VCOM
Internal Compensation Node Biased at Half the Tuning Range. Decoupling capacitors to the ground plane
should be placed as close as possible to this pin.
24
VREF
Reference Voltage. Decoupling capacitors to the ground plane should be placed as close as possible to this pin.
25
LD
Lock Detect Output Pin. This pin outputs a logic high to indicate PLL lock. A logic low output indicates loss of PLL lock.
26
PDBRF
RF Power-Down. A logic low on this pin mutes the RF outputs. This function is also software controllable.
27
DGND
Digital Ground. Ground return path for DVDD.
28
DVDD
Digital Power Supply. This pin should be the same voltage as AVDD. Decoupling capacitors to the ground plane
should be placed as close as possible to this pin.
29
REFIN
Reference Input. This is a CMOS input with a nominal threshold of VDD/2 and a dc equivalent input resistance of
100 kΩ. This input can be driven from a TTL or CMOS crystal oscillator, or it can be ac-coupled.
30
MUXOUT
Multiplexer Output. This multiplexer output allows either the lock detect, the scaled RF, or the scaled reference
frequency to be accessed externally.
31
SDGND
Digital Sigma-Delta (Σ-Δ) Modulator Ground. Ground return path for the Σ-Δ modulator.
32
SDVDD
Power Supply Pin for the Digital Σ-Δ Modulator. Should be the same voltage as AVDD. Decoupling capacitors to
the ground plane are to be placed as close as possible to this pin.
33
EP
Exposed Pad.
相关PDF资料
PDF描述
ADF4351BCPZ IC SYNTH PLL VCO 32LFCSP
ADF4360-0BCPZRL7 IC SYNTHESIZER VCO 24LFCSP
ADF4360-1BCPZRL7 IC SYNTHESIZER VCO 24LFCSP
ADF4360-2BCPZRL7 IC SYNTHESIZER VCO 24LFCSP
ADF4360-3BCPZRL7 IC SYNTHESIZER VCO 24LFCSP
相关代理商/技术参数
参数描述
ADF4350BCPZ-RL7 功能描述:IC SYNTH PLL VCO FN/IN 32LFCSP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器,PLL,频率合成器 系列:- 标准包装:2,000 系列:- 类型:PLL 频率合成器 PLL:是 输入:晶体 输出:时钟 电路数:1 比率 - 输入:输出:1:1 差分 - 输入:输出:无/无 频率 - 最大:1GHz 除法器/乘法器:是/无 电源电压:4.5 V ~ 5.5 V 工作温度:-20°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-LSSOP(0.175",4.40mm 宽) 供应商设备封装:16-SSOP 包装:带卷 (TR) 其它名称:NJW1504V-TE1-NDNJW1504V-TE1TR
ADF4350BCPZ-U6 制造商:Analog Devices 功能描述:
ADF4350EB1Z 制造商:Analog Devices 功能描述:AD EVAL BOARD - Bulk
ADF4351 制造商:AD 制造商全称:Analog Devices 功能描述:Wideband Synthesizer
ADF4351BCPZ 功能描述:IC SYNTH PLL VCO 32LFCSP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器,PLL,频率合成器 系列:- 标准包装:2,000 系列:- 类型:PLL 时钟发生器 PLL:带旁路 输入:LVCMOS,LVPECL 输出:LVCMOS 电路数:1 比率 - 输入:输出:2:11 差分 - 输入:输出:是/无 频率 - 最大:240MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:32-LQFP 供应商设备封装:32-TQFP(7x7) 包装:带卷 (TR)