参数资料
型号: ADM1041A-EVALZ
厂商: Analog Devices Inc
文件页数: 20/56页
文件大小: 0K
描述: BOARD EVAL FOR ADM1041A
标准包装: 1
主要目的: AC/DC,次级
输出及类型: 1,非隔离
功率 - 输出: 24W
输出电压: 12V
电流 - 输出: 2A
输入电压: 85 ~ 132VAC
板类型: 完全填充
已供物品: 板,线缆,软件
已用 IC / 零件: ADM1041A
ADM1041A
70
60
50
40
30
20
10
VOLTAGE ERROR AMPLIFIER
This is a high gain transconductance amplifier that takes its
input from the load voltage trim stage described previously. The
amplifier requires only the output pin for loop compensation,
which typically consists of a series RC network-to-common. A
parallel resistor may be added to common to reduce the open-
loop gain and thereby provide some output voltage droop as
output current increases. The output of the amplifier is typically
connected to an emitter follower that drives an optocoupler,
which in turn controls the duty of the primary side PWM. The
emitter follower should have a high gain to minimize loading
0
0
1
2
VOLTAGE (V)
3
4
effects on the amplifier. Alternatively, an op amp voltage
follower may be used. See Figure 11.
2.75
2.50
2.25
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
Figure 10. Current Limit
MAIN VOLTAGE REFERENCE
A 1.5 V reference is connected to the inverting input of the
voltage error amplifier. This 1.5 V reference is the output
voltage of the soft-start circuit. Under closed-loop conditions,
the voltage at the noninverting input is also controlled to 1.5 V.
During start-up, the output voltage should be ramped up in a
linear fashion at a rate that is independent of the load current.
This is achieved by digitally ramping up the reference voltage by
using a counter and a DAC. The ramp rate is configurable via
the SMBus. See Figure 13.
CURRENT-SENSE AMPLIFIER
This is a two-stage differential amplifier that achieves low offset
0
1
10
100
1k
10k 100k
1M
10M
100M
and accuracy. The amplifier has the option to be chopped to
220
200
180
160
140
120
100
80
60
40
20
BANDWIDTH
Figure 11. V CMP Transconductance
reduce offset or left as a linear amplifier without chopping.
Refer to the Register Listing for more details. The amplifier’s
gain can be selected from three ranges. It is followed by a trim
stage and then by a low gain buffer stage that can be configured
with a gain of 1.0 or 2.1. The result is a total of six overlapping
gain ranges (65 to 230), one of which must be selected via the
SMBus. This gives ample adjustment to compensate for the
poor initial tolerance of the resistance wires typically used for
current sensing. It also allows selecting a higher sensitivity for
better efficiency or a lower sensitivity for better accuracy (lower
offset). The amplifier offset voltage is trimmed to zero in a
once-off operation via the SMBus and uses a voltage-controlled
current source at the output of the first gain stage. A second
controlled current source is used to trim out the additional
offset due to the mismatch of the external divider resistors. This
0
1
10
100
1k
10k 100k
BANDWIDTH
1M
10M
100M
offset trim is dynamically adjusted according to the common-
mode voltage present at the top of the voltage dividers. Six
ranges are selectable according to the magnitude and polarity of
Figure 12. C CMP and S CMP Transconductance
this offset component. Because the offset compensation circuit
itself has some inaccuracies, the best overall current-sense
accuracy is obtained by using more closely matched external
dividers and then selecting a low compensation range. See
Rev. 0 | Page 20 of 56
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