参数资料
型号: ADM1041A-EVALZ
厂商: Analog Devices Inc
文件页数: 30/56页
文件大小: 0K
描述: BOARD EVAL FOR ADM1041A
标准包装: 1
主要目的: AC/DC,次级
输出及类型: 1,非隔离
功率 - 输出: 24W
输出电压: 12V
电流 - 输出: 2A
输入电压: 85 ~ 132VAC
板类型: 完全填充
已供物品: 板,线缆,软件
已用 IC / 零件: ADM1041A
ADM1041A
SMBus SERIAL PORT
The programming and microprocessor interface for the
ADM1041A is a standard SMBus serial port, which consists of a
clock line and a data line. The more rigorous requirements of
the SMBus standard are specified in order to give the greatest
noise immunity. The ADM1041A operates in slave mode only.
If a microprocessor is not used, these pins can be configured to
perform the PS ON LINK and AC_OKLink functions. Note that
this port is not intended to be connected to the customer’s
SMBus (or I 2 C bus). Continuous SMBus activity or an external
bus fault interferes with the interpart communication, possibly
preventing proper operation and proper fault reporting. If the
customer needs status and control functions via the SMBus, it is
recommended that a microprocessor with a hardware SMBus
(I 2 C) port be used for this interface. The microprocessor should
access the ADM1041As via a second SMBus port, which may be
emulated in software (subset of the full protocol).
MICROPROCESSOR SUPPORT
The ADM1041A has many features that allow it to operate with
the aid of a microprocessor. There are several reasons why a
microprocessor might be used:
Interfacing
The microprocessor must access the ADM1041A(s) via their
on-board SMBus (I 2 C) port. Because this port is also used to
configure the ADM1041A(s), the software must include a
routine that avoids SMBus activity during configuration. The
simplest interface is for the microprocessor to have an SMBus
(I 2 C) port implemented in hardware, but this may be more
expensive. An alternative is to emulate the bus in software and
to use two general-purpose logic I/O pins. Only a simple subset
of the SMBus protocol need be emulated because the
ADM1041A always operates as a slave device.
Configuring for a Microprocessor
Except during initial configuration, all ADM1041A registers
that need to be accessed are high speed CMOS devices that do
not involve EEPROM. Table 43, the Microprocessor Support
table describes the various registers, bits, and flags that can be
read and written to.
Note that for the microprocessor to gain control of the PSON
and AC SENSE functions, Reg12h (Table 27) must be configured.
A separate configuration bit is allocated to each signal. The
microprocessor can then write to the signal as though the
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To provide unusual logic and/or timing requirements,
particularly for fault conditions.
To drive one or more LEDs, including flashing, according
to the status of the power supply.
To replace other discrete circuits such as multiple OTP,
extra output monitoring, fan speed control, and failure
detection, and combine the status of these circuits with the
status of the ADM1041As.
To free up some pins on the ADM1041As. This could
reduce the BOM and therefore the cost.
To interface to an external SMBus (or I 2 C) for more
detailed status reporting. The SMBus port in the
ADM1041A is not intended for this purpose.
To allow EEPROM space in ADM1041A(s) or in the
microprocessor to be used for FRU (VPD) data. A simple
or complex microprocessor can be used according to the
amount of additional functionality required. Note that the
microprocessor is not intended to access or modify the
EEPROM address space that is used for the configuration
of the ADM1041A(s).
signal originated within the ADM1041A itself.
BROADCASTING
In a power supply with multiple outputs, it is recommended
that all outputs rise together. Because the SMBus is relatively
slow, writing sequentially to the PSON signal in each
ADM1041A, for instance, causes a significant delay in the
output rise of the last chip to be written. The ADM1041A
avoids this problem by allocating a common broadcast address
that all chips can respond to. To avoid data collisions, this
feature should be used only for commands that do not initiate a
reply.
SMBus SERIAL INTERFACE
Control of the ADM1041A is carried out via the SMBus. The
ADM1041A is connected to this bus as a slave device under the
control of a master device.
The ADM1041A has a 7-bit serial bus slave address. When the
device is powered up, it does so with a default serial bus
address. The default power-on SMBus address for the device is
1010XXX binary, the three lowest address bits (A2 to A0) being
defined by the state of the address pin, ADD0, and Bit 1 of
Configuration Register 4 (ADD1). Because ADD0 has three
possible states (tied to V DD , tied to GND, or floating) and
Config4 < 1 > can be high or low, there are a total of six possible
addresses, as shown in Table 6.
Rev. 0 | Page 30 of 56
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