参数资料
型号: ADM1041AARQZ-REEL7
厂商: Analog Devices Inc
文件页数: 40/64页
文件大小: 0K
描述: IC SECONDARY SIDE CTRLR 24QSOP
产品变化通告: Product Discontinuance 27/Oct/2011
标准包装: 1,000
应用: 次级侧控制器
电源电压: 4.5 V ~ 5.5 V
电流 - 电源: 6mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.154",3.90mm 宽)
供应商设备封装: 24-QSOP
包装: 带卷 (TR)
配用: ADM1041-EVAL-ND - BOARD EVALUATION ADM1041
ADM1041
EXTENDED SMBus ADDRESSING
A potential problem exists when using more than three
ADM1041s in a single power supply. The first time the device is
V DD
powered up, Bit 1 of Configuration Register 1 (ADD1) is 0. This
means that only three device addresses are initially available
defined by ADD0; if there are more than three devices in a
ICT 8
SCL 13
AC_OKLink
PS ON Link
system, two or more of them will have duplicate addresses. See
N/C 15 ADD0
SDA 14
DEVICE 5
To overcome this problem, the ICT pin has additional function-
ality. Taking ICT below GND temporarily disables the SMBus
ICT 8
function of the device. Thus, if the ICT pin of all devices in
which ADD1 is to remain 0 are taken negative, the ADD1 bits of
all other devices can be set to 1 via the SMBus. Each device then
has a unique address. Internal diodes clamp the negative voltage
ADD1 = 1
V DD
SCL 13
SDA 14
15 ADD0
DEVICE 4
to about 0.6 V, and care should be taken to limit the current to
less than approximately 5 mA on each ICT input to prevent the
possibility of damage or latch-up. The suggested current is
ICT 8
SCL 13
3 mA. One example of a suitable circuit is given in Figure 38. The
ADM1041s can then be configured and trimmed. If required,
15 ADD0
SDA 14
AC_OKLink and PS ON LINK must be configured last. If ICT is
DEVICE 3
used for its intended purpose as a current transformer input,
care must be taken with the circuit design to allow the extended
SMBus addressing to work.
ICT 8
SCL 13
4k ?
BACKDOOR ACCESS
N/C 15 ADD0
SDA 14
2.4mA
After SCL and SDA have been configured as AC_OKLink and
DEVICE 2
PS ON LINK, it may be desired to recover the SMBus access to the
ADM1041. Changes may be necessary to the internal configura-
ICT 8
4k ?
EXTENDED
SMBus
ADDRESSING
tion or trim bits. This is achieved by holding the SCL and SDA
pins at 0 V (ground) while cycling V DD . SCL and SDA then
revert to SMBus operation. See Figure 38.
ADD1 = 0
V DD
15 ADD0
SCL 13
SDA 14
–12V
DEVICE 1
4k ?
ICT 8
SCL 13
15 ADD0
SDA 14
DEVICE 0
BACKDOOR
Figure 38. Extended SMBus Addressing and Backdoor Access
Rev. A | Page 40 of 64
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