参数资料
| 型号： | ADM1041AARQZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 34/56页 |
| 文件大小： | 0K |
| 描述： | IC SECONDARY SIDE CTRLR 24QSOP |
| 产品变化通告： | Product Discontinuance 27/Oct/2011 |
| 标准包装： | 56 |
| 应用： | 次级侧控制器 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 电流 - 电源： | 6mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 24-QSOP |
| 包装： | 管件 |
| 配用： | ADM1041-EVAL-ND - BOARD EVALUATION ADM1041 |
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ADM1041A
If it is required to read data from the RAM immediately after
setting up the address, the master can assert a repeat start
condition immediately after the final ACK and carry out a
single-byte read, block read, or block write operation without
asserting an intermediate stop condition.
Write Byte/Word
?
Write a single byte of data to EEPROM. In this case, the
command byte is the high byte of the EEPROM address,
80h or 81h. The first data byte is the low byte of the
EEPROM address and the second data byte is the actual
data. Bit 1 of EEPROM Register 3 must be set. This is
In this operation, the master device sends a command byte and
one or two data bytes to the slave device, as follows:
1
S
2
SLAVE
ADDRESS
3
W A
4
EEPROM
ADDRESS
HIGH BYTE
5
A
6
EEPROM
ADDRESS
LOW BYTE
7
A
8
DATA
9 10
A P
1.
The master device asserts a start condition on SDA.
(80h OR 81h)
(00h TO FFh)
2.
3.
4.
5.
6.
7.
8.
9.
The master sends the 7-bit slave address followed by the
write bit (low).
The addressed slave device asserts ACK on SDA.
The master sends a command code.
The slave asserts ACK on SDA.
The master sends a data byte.
The slave asserts ACK on SDA.
The master sends a data byte (or asserts stop at this point).
The slave asserts ACK on SDA.
Figure 33. Single-Byte Write to EEPROM
If it is required to read data from the ADM1041A immediately
after setting up the address, the master can assert a repeat start
condition immediately after the final ACK and carry out a
single-byte read, block read, or block write operation without
asserting an intermediate stop condition.
Block Write
In this operation, the master device writes a block of data to a
slave device. Programming an EEPROM byte takes
approximately 350 μs, which limits the SMBus clock for
repeated or block write operations. The start address for a block
10. The master asserts a stop condition on SDA to end the
transaction.
In the ADM1041A, the write byte/word protocol is used for
the following three purposes. The ADM1041A knows how to
write must have been set previously. In the case of the
ADM1041A, this is done by a send byte operation to set a RAM
address or by a write byte/ word operation to set an EEPROM
address.
respond by the value of the command byte.
1.
The master device asserts a start condition on SDA.
?
Write a single byte of data to RAM. Here, the command
byte is the RAM address from 00h to 7Fh and the (only)
2.
3.
The master sends the 7-bit slave address followed by the
write bit (low).
The addressed slave device asserts ACK on SDA.
1
S
2
SLAVE
ADDRESS
3
W A
4
RAM
ADDRESS
(00h TO 7Fh)
5
A
6
DATA
7 8
A P
4.
The master sends a command code that tells the slave
device to expect a block write. The ADM1041A command
code for a block read is A0h (10100000).
5.
The slave asserts ACK on SDA.
?
Figure 31. Single-Byte Write to RAM
Set up a 2-byte EEPROM address for a subsequent read or
block read. In this case, the command byte is the high byte
of the EEPROM address (80h). The (only) data byte is the
6.
7.
The master sends a data byte that tells the slave device how
many data bytes are to be sent. The SMBus specification
allows a maximum of 32 data bytes to be sent in a block
write.
The slave asserts ACK on SDA.
1
S
2
SLAVE
ADDRESS
3
W A
4
EEPROM
ADDRESS
HIGH BYTE
5
A
6
EEPROM
ADDRESS
LOW BYTE
7 8
A P
8.
9.
The master sends N data bytes.
The slave asserts ACK on SDA after each data byte.
(80h OR 81h)
(00h TO FFh)
10. The master asserts a stop condition on SDA to end the
Figure 32. Setting an EEPROM Address
transaction.
If it is required to read data from the EEPROM immedi-
ately after setting up the address, the master can assert a
1
S
2
SLAVE
ADDRESS
3
W A
4
COMMAND A0h
(BLOCK WRITE)
5
A
6
BYTE
COUNT
7 8 9 10
A DATA 1 A DATA 2 A DATA N A P
repeat start condition immediately after the final ACK and
carry out a single-byte read or a block read without
asserting an intermediate stop condition.
Rev. 0 | Page 34 of 56
Figure 34. Block Write to EEPROM or RAM
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| ADM1041AARQZ-REEL | 功能描述:IC SECONDARY SIDE CTRLR 24QSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 电源控制器，监视器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 应用:多相控制器 输入电压:- 电源电压:9 V ~ 14 V 电流 - 电源:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:40-WFQFN 裸露焊盘 供应商设备封装:40-TQFN-EP（5x5） 包装:带卷 (TR) |
| ADM1041AARQZ-REEL7 | 功能描述:IC SECONDARY SIDE CTRLR 24QSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 电源控制器，监视器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 应用:多相控制器 输入电压:- 电源电压:9 V ~ 14 V 电流 - 电源:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:40-WFQFN 裸露焊盘 供应商设备封装:40-TQFN-EP（5x5） 包装:带卷 (TR) |
| ADM1041A-EVALZ | 功能描述:BOARD EVAL FOR ADM1041A RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 标准包装:1 系列:- 主要目的:DC/DC，步降 输出及类型:1，非隔离 功率 - 输出:- 输出电压:3.3V 电流 - 输出:3A 输入电压:4.5 V ~ 28 V 稳压器拓扑结构:降压 频率 - 开关:250kHz 板类型:完全填充 已供物品:板 已用 IC / 零件:L7981 其它名称:497-12113STEVAL-ISA094V1-ND |
| ADM1041ARQ | 功能描述:IC PWR SUPP MON/LOAD SHAR 24QSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 电源控制器，监视器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 应用:多相控制器 输入电压:- 电源电压:9 V ~ 14 V 电流 - 电源:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:40-WFQFN 裸露焊盘 供应商设备封装:40-TQFN-EP（5x5） 包装:带卷 (TR) |
| ADM1041ARQ-2 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
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