参数资料
| 型号： | ADM1041AARQZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 49/56页 |
| 文件大小： | 0K |
| 描述： | IC SECONDARY SIDE CTRLR 24QSOP |
| 产品变化通告： | Product Discontinuance 27/Oct/2011 |
| 标准包装： | 56 |
| 应用： | 次级侧控制器 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 电流 - 电源： | 6mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 24-QSOP |
| 包装： | 管件 |
| 配用： | ADM1041-EVAL-ND - BOARD EVALUATION ADM1041 |
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ADM1041A
MICROPROCESSOR SUPPORT
Possible ways to turn the ADM1041A on or off in response to a system request or a fault include the following:
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Daisy-chaining other ADM1041A PSON pins to the PEN pin, which is controlled by PSON on one ADM1041A.
Use a microprocessor to control the PSON, the system interface, and any shutdowns due to faults.
Connect all AC_OKLink pins together and connect all PS ON LINK pins together. These pins must be configured appropriately.
Flags appended with _L are latched (Registers 2Ah/2Bh/2Ch). The latch is reset when the flag is read, except when the fault is still present.
It is advisable to continue reading the flag(s) until the fault(s) have cleared.
Table 43.
Mnemonic
m_pson_r
Description
Allows the microprocessor to read the state of PSON. This allows only one
Register
02h
Bit
6
Read/Write
Read-only
ADM1041A to be configured as the PSON interface to the host system.
Micro PS_ON
Allows the microprocessor to write to control the PSON function of each
12h
1
Read/Write
ADM1041A. When in microprocessor support mode, the principle
configuration for controlling power-on/power-off is as follows. One
ADM1041A is configured as the interface to the host system through the
standard PSON pin. This pin is configured not to write through to the PSON
debounce block. The microprocessor polls the status of this ADM1041A by
reading m_pson_r. Debouncing is done by the microprocessor. If m_pson_r
changed state, the microprocessor writes the new state to m_pson_w in all
ADM1041As on the SMBus. If a fault occurs on any output, the SMBAlert
interrupt requests microprocessor attention. If this means turning all
ADM1041As off, this is done by writing a zero to the m_pson_w bit.
m_acsns_r
Allows the microprocessor to read the state of AC SENSE 1/AC SENSE 2. This allows
02h
7
Read-only
one ADM1041A to be configured as the interface to the host power supply.
Micro AC SENSE
Allows the microprocessor to write to control the AC SENSE function of each
12h
5
Read/Write
ADM1041A. When in microprocessor support mode the principle configuration
for controlling AC_OK, undervoltage blanking, PEN gating, and RAMP/SS
gating is as follows. One ADM1041A is configured to be the interface with the
host power supply AC monitoring circuitry. This ADM1041A can be configured
so that the acsns signal is written through or would not be written through.
Regardless, the microprocessor monitors m_acsns_r and write to m_acsns_w
as appropriate. Because it is possible to sense but not to write through, it is
possible to configure a second ADM1041A to monitor a second ac or bulk
voltage.
Micro Share Clamp
Allows the μP to write directly to m_shr_clmp to control when the ISHARE
13h
2
Read/Write
clamp is released. During a hot-swap insertion, there may be a need to delay
the release of the ISHARE clamp. This allows the designer an option over the
default release at 75% or 88% of the reference ramp (soft start).
Micro CBD Write
Allows the microprocessor to write directly to CBD as a possible way of adding
13h
1
Read/Write
an additional output port. This might be for blinking LEDs or as a fault signal to
the system.
Micro CBD Clear
Allows the microprocessor to clear the CBD latch following an SMBalert. If CBD
13h
0
Read/Write
is configured to be latching, there may be circumstances that lead to
CBD/SMBAlert being set by, for example, one of the MON flags, but does not
lead to PSON being cycled and CBD being reset. In this case, the
microprocessor needs to write directly to CBD to reset the latch.
Mon5 Flag
Mon4 Flag
Mon3 Flag
Mon2 Flag
Mon1 Flag
OCP Timeout
UV Fault
OV Fault
This flag indicates the status of the MON5 pin.
This flag indicates the status of the MON4 pin.
This flag indicates the status of the MON3 pin.
This flag indicates the status of the MON2 pin.
This flag indicates the status of the MON1 pin.
If this flag is high, an overcurrent has occurred and timed out.
If this flag is high, an undervoltage has been sensed
If this flag is high, an overvoltage has been sensed.
00h
00h
00h
00h
00h
00h
00h
00h
0
1
2
3
4
5
6
7
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Rev. 0 | Page 49 of 56
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| ADM1041AARQZ-REEL | 功能描述:IC SECONDARY SIDE CTRLR 24QSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 电源控制器，监视器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 应用:多相控制器 输入电压:- 电源电压:9 V ~ 14 V 电流 - 电源:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:40-WFQFN 裸露焊盘 供应商设备封装:40-TQFN-EP（5x5） 包装:带卷 (TR) |
| ADM1041AARQZ-REEL7 | 功能描述:IC SECONDARY SIDE CTRLR 24QSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 电源控制器，监视器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 应用:多相控制器 输入电压:- 电源电压:9 V ~ 14 V 电流 - 电源:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:40-WFQFN 裸露焊盘 供应商设备封装:40-TQFN-EP（5x5） 包装:带卷 (TR) |
| ADM1041A-EVALZ | 功能描述:BOARD EVAL FOR ADM1041A RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 标准包装:1 系列:- 主要目的:DC/DC，步降 输出及类型:1，非隔离 功率 - 输出:- 输出电压:3.3V 电流 - 输出:3A 输入电压:4.5 V ~ 28 V 稳压器拓扑结构:降压 频率 - 开关:250kHz 板类型:完全填充 已供物品:板 已用 IC / 零件:L7981 其它名称:497-12113STEVAL-ISA094V1-ND |
| ADM1041ARQ | 功能描述:IC PWR SUPP MON/LOAD SHAR 24QSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 电源控制器，监视器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 应用:多相控制器 输入电压:- 电源电压:9 V ~ 14 V 电流 - 电源:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:40-WFQFN 裸露焊盘 供应商设备封装:40-TQFN-EP（5x5） 包装:带卷 (TR) |
| ADM1041ARQ-2 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
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