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参数资料
| 型号： | ADMC300BST |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | 数字信号处理 |
| 英文描述： | High Performance DSP-Based Motor Controller |
| 中文描述： | 0-BIT, 12.5 MHz, OTHER DSP, PQFP80 |
| 封装： | PLASTIC, TQFP-80 |
| 文件页数： | 13/42页 |
| 文件大小： | 297K |
| 代理商： | ADMC300BST |
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ADMC300
–13–
REV. B
be configured as either a differential or single-ended input for
maximum flexibility in interfacing to external sensors and inputs.
The sigma-delta converter consists of two stages, a modulator
and a sinc filter, that combine to produce a 16-bit conversion.
For each channel, signal-to-noise ratios of 76 dB may be achieved,
corresponding to greater than 12 bits of resolution from each
converter. Input signals up to 16.27 kHz may be converted.
For maximum flexibility, the five ADCs are arranged as two
banks; ADC1 and ADC2 forming Bank A, and ADC3, ADC4
and ADC5 forming Bank B. The characteristics of each bank,
such as sampling rate, internal or external conversion, synchro-
nization to the PWM block, operating modes, may be con-
trolled independently. The ADC registers of each bank may be
loaded from an internal signal whose frequency may be pro-
grammed as a precise fraction of the CLKIN frequency. Alter-
natively, the ADCs may be updated by an external signal on
the CONVST pin. There are two dedicated ADC interrupts;
one for each bank of converters that can be used to signal that
the ADCs of the particular bank have been updated.
The ADC system also contains a built-in calibration function
that may be used to null any offsets within the ADC converters.
Each ADC channel may be placed in the calibration state indi-
vidually or in combination with other channels.
In addition, the ADC system provides three multiplexer control
pins that may be used in conjunction with an external multi-
plexer to permit external signal expansion.
There is a separate reference input for each bank of converters.
However, the ADMC300 also provides a reference output that
could be buffered and used as a reference source for either or
both banks.
Input Configuration
The input to each ADC may be applied to the ADMC300 in
either a single-ended or differential configuration. In many
cases, a single-ended configuration is easier to provide but the
differential connection permits the reduction of common-mode
noise from the input signal. Each ADC input may be config-
ured for single-ended or differential inputs as appropriate,
completely independent of the other channels. Figure 6 illus-
trates a typical differential configuration for the inputs of one
ADC channel of the ADMC300. The input signals are applied
to pins Vx and VxN (for example V1 and V1N). For correct
operation and maximum input dynamic range, the inputs sig-
nals should be centered on the reference voltage level, V
REF
.
Therefore, the signal applied to the Vx pin should be V
IN
+ V
REF
,
where V
IN
is the analog input voltage. The corresponding signal
applied to the inverting terminal of the differential input, VxN,
is then –V
IN
+ V
REF
so that the differential signal applied to the
ADC input is actually 2 V
IN
.
The input RC combination of 100
and 0.047
μ
F provides a
first-order low-pass antialiasing filter with a cutoff frequency of
34 kHz. An advantage to sigma-delta ADCs is that the initial
(analog) signal filtering required for antialiasing is much more
modest than that required by other ADCs. With the sigma-delta
ADC, the input filter needed for the analog signal only has to
cut off at one-half of the modulator frequency, rather than the
lower effective sampling frequency. For the ADMC300, the
modulator runs 64 times faster than the sampling frequency.
Thus for a 32.5 kHz sampling rate, the modulator frequency
is 2.08 MHz, meaning the needed cutoff for the analog input
signal is 1.04 MHz. Therefore, a simple first order filter, such
as the RC filter shown in Figure 6, which provides a more than
30 dB attenuation to signals above 1 MHz (3 dB at 34 kHz) is ade-
quate. The additional antialiasing band limiting required by the
Nyquist criterion for the 32.5 kHz sampling rate (a cutoff of
16.25 kHz) is supplied by the high order sinc filter in the digital
domain.
V
IN
+ V
REF
ADMC300
VxN
REFINA
REFINB
0.1 F
0.047 F
0.0047 F
Vx
–
V
IN
+ V
REF
V
REF
0.047 F
100
100
Figure 6. Differential Configuration for ADC Input of
ADMC300
V
IN
+ V
REF
ADMC300
VxN
REFINA
REFINB
0.1 F
0.047 F
Vx
V
REF
100
Figure 7. Single-Ended Configuration for ADC Input of
ADMC300
V
REF
0.1 F
ADMC300
VREF
VxN
REFINA
REFINB
0.1 F
Figure 8. Connection of Internal Voltage Reference of
ADMC300
相关PDF资料 |
PDF描述 |
|---|---|
| ADMC300-ADVEVALKIT | Circular Connector; No. of Contacts:13; Series:MS27497; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:10; Circular Contact Gender:Socket; Circular Shell Style:Wall Mount Receptacle RoHS Compliant: No |
| ADMC328TN | 28-Lead ROM-Based DSP Motor Controller with Current Sense |
| ADMC328TR | 28-Lead ROM-Based DSP Motor Controller with Current Sense |
| ADMC328YN | 28-Lead ROM-Based DSP Motor Controller with Current Sense |
| ADMC328YR | 28-Lead ROM-Based DSP Motor Controller with Current Sense |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADMC300BSTZ | 制造商:Analog Devices 功能描述:DSP Motor Controller 80-Pin TQFP |
| ADMC300-PB | 制造商:AD 制造商全称:Analog Devices 功能描述:High Performance DSP-Based Motor Controller |
| ADMC326 | 制造商:AD 制造商全称:Analog Devices 功能描述:28-Lead ROM-Based DSP Motor Controller |
| ADMC326TN | 制造商:AD 制造商全称:Analog Devices 功能描述:28-Lead ROM-Based DSP Motor Controller |
| ADMC326TN-XXX-YY | 制造商:未知厂家 制造商全称:未知厂家 功能描述:MOTOR CONTROLLER |
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