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参数资料
| 型号： | ADMC300BST |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | 数字信号处理 |
| 英文描述： | High Performance DSP-Based Motor Controller |
| 中文描述： | 0-BIT, 12.5 MHz, OTHER DSP, PQFP80 |
| 封装： | PLASTIC, TQFP-80 |
| 文件页数： | 9/42页 |
| 文件大小： | 297K |
| 代理商： | ADMC300BST |
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ADMC300
–9–
REV. B
Two data address generators (DAGs) provide addresses for
simultaneous dual operand fetches from data memory and
program memory. Each DAG maintains and updates four
address pointers (I registers). Whenever the pointer is used to
access data (indirect addressing), it is post-modified by the
value in one of four modify (M) registers. A length value may
be associated with each pointer (L registers) to implement
automatic modulo addressing for circular buffers. The circular
buffering feature is also used by the serial ports for automatic
data transfers to and from on-chip memory. DAG1 generates
only data memory address but provides an optional bit-reversal
capability. DAG2 may generate either program or data memory
addresses, but has no bit-reversal capability.
Efficient data transfer is achieved with the use of five internal
buses:
Program Memory Address (PMA) Bus
Program Memory Data (PMD) Bus
Data Memory Address (DMA) Bus
Data Memory Data (DMD) Bus
Result (R) Bus
Program memory can store both instructions and data, permit-
ting the ADMC300 to fetch two operands in a single cycle—
one from program memory and one from data memory. The
ADMC300 can fetch an operand from on-chip program memory
and the next instruction in the same cycle.
The ADMC300 writes data from its 16-bit registers to the 24-bit
program memory using the PX register to provide the lower
eight bits. When it reads data (not instructions) from 24-bit
program memory to a 16-bit data register, the lower eight bits
are placed in the PX register.
The ADMC300 can respond to a number of distinct DSP core
and peripheral interrupts. The DSP core interrupts include
serial port receive and transmit interrupts, timer interrupts,
software interrupts and external interrupts. The motor control
peripherals also produce interrupts to the DSP core.
The two serial ports (SPORTs) provide a complete synchro-
nous serial interface with optional companding in hardware and
a wide variety of framed and unframed data transmit and re-
ceive modes of operation. Each SPORT can generate an inter-
nal programmable serial clock or accept an external serial clock.
Boot loading of both the program and data memory RAM of
the ADMC300 is through the serial port SPORT1.
A programmable interval counter is also included in the DSP
core and can be used to generate periodic interrupts. A 16-bit
count register (TCOUNT) is decremented every
n
processor
cycles, where n–1 is a scaling value stored in the 8-bit TSCALE
register. When the value of the counter reaches zero, an interrupt
is generated and the count register is reloaded from a 16-bit
period register (TPERIOD).
The ADMC300 instruction set provides flexible data moves
and multifunction (one or two data moves with a computation)
instructions. Each instruction is executed in a single 40 ns
processor cycle (for a 12.5 MHz CLKIN). The ADMC300
assembly language uses an algebraic syntax for ease of coding
and readability. A comprehensive set of development tools
support program development. For further information on the
DSP core, refer to the
ADSP-2100 Family User’s Manual, Third
Edition
, with particular reference to the ADSP-2171.
Serial Ports
The ADMC300 incorporates two complete synchronous serial
ports (SPORT0 and SPORT1) for serial communication and
multiprocessor communication. Following is a brief list of capa-
bilities of the ADMC300 SPORTs. Refer to the
ADSP-2100
Family User’s Manual, Third Edition,
for further details.
SPORTs are bidirectional and have a separate, double-
buffered transmit and receive section.
SPORTs can use an external serial clock or generate their
own serial clock internally.
SPORTs have independent framing for the receive and
transmit sections. Sections run in a frameless mode or with
frame synchronization signals internally or externally generated.
Frame synchronization signals are active high or inverted, with
either of two pulsewidths and timings.
SPORTs support serial data word lengths from 3 bits to 16
bits and provide optional A-law and
μ
-law companding ac-
cording to ITU (formerly CCITT) recommendation G.711.
SPORT receive and transmit sections can generate unique
interrupts on completing a data word transfer.
SPORTs can receive and transmit an entire circular buffer of
data with only one overhead cycle per data word. An inter-
rupt is generated after a data buffer transfer.
SPORT0 has a multichannel interface to selectively receive
and transmit a 24-word or 32-word, time-division multi-
plexed, serial bitstream.
SPORT1 can be configured to have two external interrupts
(
IRQ0
and
IRQ1
), and the Flag In and Flag Out signals.
The internally generated serial clock may still be used in this
configuration.
SPORT1 is the default input for program and data memory
boot loading. The RFS1 pin can be configured internal to
the ADMC300 as an SROM/E
2
PROM reset signal.
SPORT1 has two data receive pins (DR1A and DR1B). The
DR1A pin is intended for synchronous boot loading from the
external SROM/E
2
PROM. The DR1B pin can be used as
the data receive pin for boot loading from an external UART
(SCI compatible) or synchronous connection, as the data
receive pin for the debugger communicating over the
debugger interface, or as the data receive pin for a general
purpose SPORT after booting. These two pins are internally
multiplexed onto the one DR1 port of the SPORT. The par-
ticular data receive pin selected is determined by a bit in the
MODECTRL register.
相关PDF资料 |
PDF描述 |
|---|---|
| ADMC300-ADVEVALKIT | Circular Connector; No. of Contacts:13; Series:MS27497; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:10; Circular Contact Gender:Socket; Circular Shell Style:Wall Mount Receptacle RoHS Compliant: No |
| ADMC328TN | 28-Lead ROM-Based DSP Motor Controller with Current Sense |
| ADMC328TR | 28-Lead ROM-Based DSP Motor Controller with Current Sense |
| ADMC328YN | 28-Lead ROM-Based DSP Motor Controller with Current Sense |
| ADMC328YR | 28-Lead ROM-Based DSP Motor Controller with Current Sense |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADMC300BSTZ | 制造商:Analog Devices 功能描述:DSP Motor Controller 80-Pin TQFP |
| ADMC300-PB | 制造商:AD 制造商全称:Analog Devices 功能描述:High Performance DSP-Based Motor Controller |
| ADMC326 | 制造商:AD 制造商全称:Analog Devices 功能描述:28-Lead ROM-Based DSP Motor Controller |
| ADMC326TN | 制造商:AD 制造商全称:Analog Devices 功能描述:28-Lead ROM-Based DSP Motor Controller |
| ADMC326TN-XXX-YY | 制造商:未知厂家 制造商全称:未知厂家 功能描述:MOTOR CONTROLLER |
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