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参数资料
| 型号： | ADP1821ARQZ-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 15/24页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 16-QSOP |
| 标准包装： | 1 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 720kHz |
| 占空比： | 90% |
| 电源电压： | 3.7 V ~ 5.5 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 包装： | 标准包装 |
| 产品目录页面： | 791 (CN2011-ZH PDF) |
| 其它名称： | ADP1821ARQZ-R7DKR |
ADP1821
For initial practical designs, a good choice for the crossover
LC FILTER BODE PLOT
= SW
frequency is 1/10 of the switching frequency; first calculate
f
f CO (19)
10
This gives sufficient frequency range to design a compensation
GAIN
0dB
f LC
–40dB/dec
f ESR
f CO
f SW
FREQUENCY
that attenuates switching artifacts, yet also gives sufficient
control loop bandwidth to provide good transient response.
The output LC filter is a resonant network that inflicts two poles
upon the response at a Frequency f LC , so next calculate
–20dB/dec
A FILTER
f LC =
1
2 π LC
(20)
The LC corner frequency is about two orders of magnitude
below the switching frequency, and therefore about one order of
magnitude below crossover. To achieve sufficient phase margin
at crossover to guarantee stability, the design must compensate
for the two poles at the LC corner frequency with two zeros to
boost the system phase prior to crossover. The two zeros require
an additional pole or two above the crossover frequency to
guarantee adequate gain margin and attenuation of switching
noise at high frequencies.
PHASE
0°
–90°
Φ FILTER
Depending on component selection, one zero might already be
generated by the ESR of the output capacitor. Calculate this zero
corner frequency, f ESR , as
–180°
Figure 16. LC Filter Bode Plot
Note that if the converter is being synchronized, the ramp
f ESR =
1
2 π R ESR C OUT
(21)
voltage, V RAMP , is lower than 1.25 V by the percentage of
frequency increase over the nominal setting of the FREQ pin
V RAMP = 1 . 25 V ? ? FREQ
?
?
This zero is often near or below crossover and is useful in
bringing back some of the phase lost at the LC corner.
? f
? f SYNC
?
?
(25)
The gain of the LC filter at crossover can be linearly
The rest of the system gain is needed to reach 0 dB at crossover.
The total gain of the system therefore, is given by
approximated from Figure 16 as
A FILTER = A LC + A ESR
A T = A MOD + A FILTER + A COMP
where:
(26)
A FILTER = ? 40 dB × log ? ? ESR
? ? 20 dB × log ? CO
? f
?
? ESR
?
?
? f
? f LC
? ? f
?
?
?
(22)
A MOD is the gain of the PWM modulator.
A FILTER is the gain of the LC filter including the effects of the
ESR zero.
A MOD = 20 log ? ?
? V IN ?
?
If f ESR ≈ f CO , then add another 3 dB to account for the local
difference between the exact solution and the preceding linear
approximation.
To compensate the control loop, the gain of the system must be
brought back up so that it is 0 dB at the desired crossover
frequency. Some gain is provided by the PWM modulation
itself, and it is given by
? (23)
? V RAMP ?
For systems using the internal oscillator, this becomes
A COMP is the gain of the compensated error amplifier.
Additionally, the phase of the system must be brought back up
to guarantee stability. Note from the bode plot of the filter that
the LC contributes ?180° of phase shift. Additionally, because
the error amplifier is an integrator at low frequency, it contrib-
utes an initial ?90°. Therefore, before adding compensation or
accounting for the ESR zero, the system is already down ?270°.
To avoid loop inversion at crossover, or ?180° phase shift, a
good initial practical design is to require a phase margin of 60°,
which gives an overall phase loss of ?120° from the initial low
frequency dc phase. The goal of the compensation is to boost
the phase back up from ?270° to ?120° at crossover.
A MOD = 20 log ?
? 1 . 25 V ?
?
? V IN ?
? ?
(24)
Rev. C | Page 15 of 24
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADP1821-BL1-EVZ | 制造商:Analog Devices 功能描述:Evaluation Board For Step-Down DC-To-DC Controller 制造商:Analog Devices 功能描述:BLANK ADISIMPOWER EVAL ADP1821 - Boxed Product (Development Kits) |
| ADP1821-BL2-EVZ | 制造商:Analog Devices 功能描述:Evaluation Board For Step-Down DC-To-DC Controller 制造商:Analog Devices 功能描述:BLANK ADISIMPOWER EVAL ADP1821 - Boxed Product (Development Kits) |
| ADP1821-EVAL | 功能描述:电源管理IC开发工具 Evaluation Board I.C. RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
| ADP1822 | 制造商:AD 制造商全称:Analog Devices 功能描述:PWM, Step-Down DC-to-DC Controller with Margining and Tracking |
| ADP1822ARQZ-R7 | 功能描述:IC REG CTRLR BUCK PWM VM 24-QSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:75 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:1MHz 占空比:81% 电源电压:4.3 V ~ 13.5 V 降压:是 升压:是 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:0°C ~ 70°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:管件 产品目录页面:1051 (CN2011-ZH PDF) 其它名称:296-2543-5 |
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