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| 型号： | ADP1821ARQZ-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 9/24页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 16-QSOP |
| 标准包装： | 1 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 720kHz |
| 占空比： | 90% |
| 电源电压： | 3.7 V ~ 5.5 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 包装： | 标准包装 |
| 产品目录页面： | 791 (CN2011-ZH PDF) |
| 其它名称： | ADP1821ARQZ-R7DKR |
ADP1821
THEORY OF OPERATION
The ADP1821 is a versatile, economical, synchronous-rectified,
fixed-frequency, PWM, voltage mode step-down controller
capable of generating an output voltage as low as 0.6 V. It is ideal
for a wide range of high power applications, such as DSP power
and processor core power in telecommunications, medical
imaging, and industrial applications. The ADP1821 controller
operates from a 3.7 V to 5.5 V supply with a power input voltage
ranging from 1.0 V to 24 V.
The ADP1821 operates at a fixed, internally set 300 kHz or
600 kHz switching frequency that is controlled by the state of
the FREQ input. The high frequency reduces external compo-
nent size and cost while maintaining high efficiency. For noise
sensitive applications where the switching frequency needs to be
more tightly controlled, synchronize the ADP1821 to an external
signal whose frequency is between 300 kHz and 1.2 MHz.
The ADP1821 includes adjustable soft start with output reverse-
current protection, and a unique adjustable, lossless current
limit. It operates over the ?40°C to +125°C temperature range
and is available in a space-saving, 16-lead QSOP.
SOFT START
When powering up or resuming operation after shutdown, over-
load, or short-circuit conditions, the ADP1821 employs an
adjustable soft start feature that reduces input current transients
and prevents output voltage overshoot at start-up and overload
conditions. The soft start period is set by the value of the soft
start capacitor, C SS , between SS and GND.
When starting the ADP1821, C SS is initially discharged. It is
enabled when SHDN is high and VCC is above the undervoltage
lockout threshold. C SS begins charging to 0.8 V through an
internal 100 kΩ resistor. As C SS charges, the regulation voltage at
FB is limited to the lesser of either the voltage at SS or the internal
0.6 V reference voltage. As the voltage at SS rises, the output
voltage rises proportionally until the voltage at SS exceeds 0.6 V. At
this time, the output voltage is regulated to the desired voltage.
If the output voltage is precharged prior to turn-on, the ADP1821
limits reverse inductor current, which would discharge the output
voltage. Once the voltage at SS exceeds the 0.6 V regulation voltage,
the reverse current is re-enabled to allow the output voltage
regulation to be independent of load current.
ERROR AMPLIFIER
The ADP1821 error amplifier is an operational amplifier. The
ADP1821 senses the output voltages through an external
resistor divider at the FB pin. The FB pin is the inverting input
to the error amplifier. The error amplifier compares this feed-
back voltage to the internal 0.6 V reference, and the output of
the error amplifier appears at the COMP pin. The COMP pin
voltage then directly controls the duty cycle of the switching
converter.
A series/parallel RC network is tied between the FB pin and the
control loop. A detailed design procedure for compensating the
Regulator section.
The error amplifier output is clamped between a lower limit of
about 0.7 V and a higher limit of about 2.4 V. When the COMP pin
is low, the switching duty cycle goes to 0%, and when the COMP
pin is high, the switching duty cycle goes to the maximum.
The SS pin is an auxiliary positive input to the error amplifier.
Whichever voltage is lowest, SS or the internal 0.6 V reference,
controls the FB pin voltage and thus the output. As a conse-
quence, if two of these inputs are close to each other, a small
offset is imposed on the error amplifier.
CURRENT-LIMIT SCHEME
The ADP1821 employs a unique, programmable, cycle-by-cycle,
lossless current-limit circuit that uses an ordinary, inexpensive
resistor to set the threshold. Every switching cycle, the synchronous
rectifier turns on for a minimum time and the voltage drop across
the MOSFET R DSON is measured to determine if the current is
too high.
This measurement is done by an internal current limit com-
parator and an external current-limit set resistor. The resistor
is connected between the switch node (that is the drain of the
rectifier MOSFET) and the CSL pin. The CSL pin, which is the
inverting input of the comparator, forces 50 μA through the
resistor to create an offset voltage drop across it.
When the inductor current is flowing in the MOSFET rectifier,
its drain is forced below PGND by the voltage drop across its
R DSON . If the R DSON voltage drop exceeds the preset drop on the
current-limit set resistor, the inverting comparator input is
similarly forced below PGND and an overcurrent fault is flagged.
The normal transient ringing on the switch node is ignored
for 100 ns after the synchronous rectifier turns on, therefore,
the over current condition must also persist for 100 ns for a
fault to be flagged.
When the ADP1821 senses an overcurrent condition, the next
switching cycle is suppressed, the soft start capacitor is discharged
through an internal 2.5 kΩ resistor, and the error amplifier
output voltage is pulled down. The output behaves like a
constant current source around the preset current limit when
the overcurrent condition exists. The ADP1821 remains in this
mode for as long as the overcurrent condition persists. In the
event of a short circuit, the short-circuit output current is the
current limit set by the R CL resistor and is monitored cycle by
cycle. When the overcurrent condition is removed, operation
resumes in soft start mode.
The ADP1821 also offers a technique for implementing a
current-limit foldback in the event of a short circuit with the
section for more information.
COMP pin to provide the compensation for the buck converter
Rev. C | Page 9 of 24
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADP1821-BL1-EVZ | 制造商:Analog Devices 功能描述:Evaluation Board For Step-Down DC-To-DC Controller 制造商:Analog Devices 功能描述:BLANK ADISIMPOWER EVAL ADP1821 - Boxed Product (Development Kits) |
| ADP1821-BL2-EVZ | 制造商:Analog Devices 功能描述:Evaluation Board For Step-Down DC-To-DC Controller 制造商:Analog Devices 功能描述:BLANK ADISIMPOWER EVAL ADP1821 - Boxed Product (Development Kits) |
| ADP1821-EVAL | 功能描述:电源管理IC开发工具 Evaluation Board I.C. RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
| ADP1822 | 制造商:AD 制造商全称:Analog Devices 功能描述:PWM, Step-Down DC-to-DC Controller with Margining and Tracking |
| ADP1822ARQZ-R7 | 功能描述:IC REG CTRLR BUCK PWM VM 24-QSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:75 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:1MHz 占空比:81% 电源电压:4.3 V ~ 13.5 V 降压:是 升压:是 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:0°C ~ 70°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:管件 产品目录页面:1051 (CN2011-ZH PDF) 其它名称:296-2543-5 |
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