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参数资料
| 型号： | ADP1822-EVAL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 15/24页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR ADP1822 |
| 标准包装： | 1 |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 1，非隔离 |
| 输出电压： | 1.8V |
| 电流 - 输出： | 10A |
| 输入电压： | 9 ~ 15 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 300kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | ADP1822 |
| 相关产品： | ADP1822ARQZ-R7DKR-ND - IC REG CTRLR BUCK PWM VM 24-QSOP ADP1822ARQZ-R7CT-ND - IC REG CTRLR BUCK PWM VM 24-QSOP ADP1822ARQZ-R7TR-ND - IC REG CTRLR BUCK PWM VM 24-QSOP |
Data Sheet
When f ESRZ is approximately the same as the switching frequency,
the square-root sum of the squares of the two ripples applies, or
ADP1822
loss exceeds the MOSFET rating, or lower resistance is required
than is available in a single MOSFET, connect multiple low-side
Δ I L
? [ Δ I L ( ESR ) ] + ?
? ?
Δ V OUT
?
? 8 ( C OUT )( f SW ) ?
P LS ? ( I LOAD ) 2 ( R ON ) ? 1 ? OUT ?
2
SELECTING THE MOSFETS
2
(6)
MOSFETs in parallel. The equation for low-side MOSFET
power loss is
? V ?
? V IN ?
(11)
P C ? ( I LOAD ) 2 ( R ON ) ? ? OUT
? V ?
?
The choice of MOSFET directly affects the dc-to-dc converter
performance. The MOSFET must have low on resistance to
reduce I 2 R losses and low gate charge to reduce transition losses.
In addition, the MOSFET must have low thermal resistance to
ensure that the power dissipated in the MOSFET does not result
in excessive MOSFET die temperature.
The high-side MOSFET carries the load current during on time
and carries all the transitions losses of the converter. Typically,
the lower the MOSFET on resistance, the higher the gate charge
and vice versa. Therefore, it is important to choose a high-side
MOSFET that balances the two losses. The conduction loss of
the high-side MOSFET is determined by
? (7)
? V IN ?
where:
P LS is the low-side MOSFET on resistance.
R ON is the total on resistance of the low-side MOSFET(s).
If multiple low-side MOSFETs are used in parallel, use the
parallel combination of the on resistances for determining R ON
to solve this equation.
SETTING THE CURRENT LIMIT
The internal current-limit circuit measures the voltage across
the low-side MOSFET to determine the load current. When the
low-side MOSFET current exceeds the current limit, the high-
side MOSFET is not allowed to turn on until the current drops
below the current-limit.
The current limit is set through the current-limit resistor, R CL .
The current-sense pin, CSL, sources 50 μA through R CL . This
( I LPK )( R ONWC )
R CL = (12)
where:
P C is the conduction power loss.
R ON is the MOSFET on resistance.
The gate-charging loss is approximated by
P T ? ( V PVCC )( Q G )( f SW )
where:
P T is the gate-charging loss power.
(8)
creates an offset voltage of resistance of R CL multiplied by the
50 μA CSL current. When the low-side MOSFET voltage is
equal to or greater than the offset voltage, the ADP1822 is in
current limit mode and prevents additional on-time cycles.
Choose the current-limit resistor by the equation
42 μA
V IN × I LOAD × ( t R + t F ) × f SW
P SW = (9)
( I PKFOLDBACK )( R ONWC )
R LO = (13)
V PVCC is the gate driver supply voltage.
Q G is the MOSFET total gate charge.
f SW is the converter switching frequency.
The high-side MOSFET transition loss is approximated by
2
where:
P SW is the high-side MOSFET switching loss power.
t R is the MOSFET rise time.
t F is the MOSFET fall time.
The total power dissipation of the high-side MOSFET is the
sum of all the previous losses, or
P HS ? ( P C ) + ( P T ) + ( P SW ) (10)
where P HS is the total high-side MOSFET power loss.
The low-side MOSFET does not carry the transition losses but
does carry the inductor current when the high-side MOSFET
is off. For high input and low output voltages, the low-side
MOSFET carries the current most of the time, and therefore to
achieve high efficiency, it is critical to optimize the low-side
MOSFET for low on resistance. In some cases, where the power
where:
I LPK is the peak inductor current.
R ONWC is the worst-case (maximum) low-side MOSFET on
resistance.
The worst-case, low-side MOSFET on resistance can be found
in the MOSFET data sheet. Note that MOSFETs typically
increase on resistance with increasing die temperature. To
determine the worst-case MOSFET on resistance, calculate the
worst-case MOSFET temperature (based on the MOSFET
power loss) and multiply by the ratio between the typical on
resistance at that temperature and the on resistance at 25°C as
listed in the MOSFET data sheet.
In addition, the ADP1822 offers a technique for implementing
a current-limit foldback in the event of a short circuit with the
use of an additional resistor, as shown in Figure 18. The resistor
R LO is largely responsible for setting the foldback current limit
during a short circuit, and R HI is mainly responsible for setting
up the normal current limit. R LO is lower than R HI .
These current-limit sense resistors can be calculated as
42 μA
Rev. D | Page 15 of 24
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