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参数资料
| 型号： | ADP1822-EVAL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 3/24页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR ADP1822 |
| 标准包装： | 1 |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 1，非隔离 |
| 输出电压： | 1.8V |
| 电流 - 输出： | 10A |
| 输入电压： | 9 ~ 15 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 300kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | ADP1822 |
| 相关产品： | ADP1822ARQZ-R7DKR-ND - IC REG CTRLR BUCK PWM VM 24-QSOP ADP1822ARQZ-R7CT-ND - IC REG CTRLR BUCK PWM VM 24-QSOP ADP1822ARQZ-R7TR-ND - IC REG CTRLR BUCK PWM VM 24-QSOP |
Data Sheet
ADP1822
SPECIFICATIONS
V VCC = V PVCC = V SHDN = V FREQ = V TRKN = 5 V, SYNC = MAR = MSEL = GND. All limits at temperature extremes are guaranteed via
correlation using standard statistical quality control (SQC). T J = ?40°C to +125°C, unless otherwise specified. Typical values are at
T A = 25°C.
Table 1.
Parameter
Conditions
Min
Typ
Max
Unit
POWER SUPPLY
Input Voltage
3.7
5.5
V
Undervoltage Lockout Threshold
Undervoltage Lockout Hysteresis
Quiescent Current
V VCC rising, T J = ?40°C to +125°C
V VCC rising, T A = 25°C
V VCC
I VCC + I VCC , not switching
2.4
2.5
2.7
2.7
0.1
1
3.0
2.9
2
V
V
V
mA
Shutdown Current
Power Stage Supply Voltage
SHDN = GND
1.0
10
24
μA
V
ERROR AMPLIFER
FB Regulation Voltage
T J = ?40°C to +85°C
594
600
606
mV
FB Input Bias Current
Error Amplifier Open-Loop Voltage Gain
COMP Output Sink Current
COMP Output Source Current
T J = ?40°C to +125°C
588
–100
600
+1
70
600
110
606
+100
mV
nA
dB
μA
μA
PWM CONTROLLER
PWM Peak Ramp Voltage
1.25
V
DL Minimum On Time
FREQ = VCC (300 kHz)
FREQ = VCC (300 kHz), T A =25°C
120
140
170
170
220
200
ns
ns
SOFT START
SS Pull-Up Resistance
SS = GND
95
k?
SS Pull-Down Resistance
V SS = 0.6 V
1.65
2.5
4.2
k?
OSCILLATOR
Oscillator Frequency
Synchronization Range
FREQ = GND
FREQ = VCC
FREQ = GND
FREQ = VCC
250
470
300
600
310
570
375
720
600
1200
kHz
kHz
kHz
kHz
SYNC Minimum Pulse Width
CURRENT SENSE
80
ns
CSL Threshold Voltage
CSL Output Current
Relative to PGND
V CSL = 0 V
?30
42
0
50
+30
54
mV
μA
Current Sense Blanking Period
GATE DRIVERS
160
ns
DH Rise Time
DH Fall Time
DL Rise Time
DL Fall Time
Driver R ON , Sourcing Current
Driver R ON , Sinking Current
DL Low to DH High Dead Time
DH Low to DL High Dead Time
C GATE = 3 nF, V DH = V IN , V BST ? V SW = 5 V
C GATE = 3 nF, V DH = V IN , V BST ? V SW = 5 V
C GATE = 3 nF, V DL = V IN
C GATE = 3 nF, V DL = 0 V
1 A, 0.7 μs pulse
1 A, 0.7 μs pulse
16
12
19
13
2
1.5
33
42
ns
ns
ns
ns
?
?
ns
ns
VOLTAGE MARGINING
High Output Voltage Margin Resistance
Low Output Voltage Margin Resistance
MUP to FB, V MAR = V MSEL = 5 V
MDN to FB, V MAR = 5 V, V MSEL = 0 V
20
20
?
?
Rev. D | Page 3 of 24
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