参数资料
型号: ADP1850ACPZ-R7
厂商: Analog Devices Inc
文件页数: 12/32页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 32LFCSP
标准包装: 1
PWM 型: 电流模式
输出数: 2
频率 - 最大: 1.725MHz
占空比: 90%
电源电压: 2.75 V ~ 20 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 32-WFQFN 裸露焊盘,CSP
包装: 标准包装
其它名称: ADP1850ACPZ-R7DKR

ADP1850
THEORY OF OPERATION
The ADP1850 is a current mode, dual-channel, step-down
switching controller with integrated MOSFET drivers for external
N-channel synchronous power MOSFETs. The two outputs are
phase shifted 180°. This reduces the input RMS ripple current,
thus minimizing required input capacitance. In addition, the
two outputs can be combined for dual-phase PWM operation
that can deliver more than 50 A output current and the two
channels are optimized for current sharing.
The ADP1850 can be set to operate in pulse skip high efficiency
mode (power saving mode) under light load or in forced PWM.
The integrated boost diodes in the ADP1850 reduce the overall
system cost and component count. The ADP1850 includes
programmable soft start, output overvoltage protection, program-
mable current limit, power good, and tracking function. The
ADP1850 can be set to operate in any switching frequency
between 200 kHz and 1.5 MHz with one external resistor.
CONTROL ARCHITECTURE
The ADP1850 is based on a fixed frequency, current mode,
PWM control architecture. The inductor current is sensed
by the voltage drop measured across the external low-side
Data Sheet
current signal is sampled at the end of the turn-off period,
which gives time for the switch node ringing to settle. Other
benefits of using current mode control scheme still apply, such
as simplicity of loop compensation. Control logic enforces
antishoot-through operation to limit cross conduction of the
internal drivers and external MOSFETs.
OSCILLATOR FREQUENCY
The internal oscillator frequency, which ranges from 200 kHz
to 1.5 MHz, is set by an external resistor, R FREQ , at the FREQ
pin. Some popular f SW values are shown in Table 4, and a graph-
ical relationship is shown in Figure 23. For instance, a 78.7 kΩ
resistor sets the oscillator frequency to 800 kHz. Furthermore,
connecting FREQ to AGND or FREQ to VCCO sets the oscil-
lator frequency to 300 kHz or 600 kHz, respectively. For other
frequencies that are not listed in Table 4, the values of R FREQ
and f SW can be obtained from Figure 23, or use the following
empirical formula to calculate these values:
R FEQ ( k Ω ) = 96568 × f SW ( kHz ) ? 1 . 065
Table 4. Setting the Oscillator Frequency
MOSFET, R DSON , during the off period of the switching cycle
(valley inductor current). The current sense signal is further
processed by the current sense amplifier. The output of the
current sense amplifier is held, and the emulated current ramp
is multiplexed and fed into the PWM comparator as shown in
Figure 22. The valley current information is captured at the end
of the off period, and the emulated current ramp is applied at
that point when the next on cycle begins. An error amplifier
integrates the error between the feedback voltage and the
generated error voltage from the COMPx pin (from error
amplifier in Figure 22).
R FREQ
332 kΩ
78.7 kΩ
60.4 kΩ
51 kΩ
40.2 kΩ
FREQ to AGND
FREQ to VCCO
410
f SW (Typical)
200 kHz
800 kHz
1000 kHz
1200 kHz
1500 kHz
300 kHz
600 kHz
R FREQ (k ? ) = 96,568 f SW (kHz) –1.065
I RAMP
V IN
R RAMP
V IN
OSC
S
R
FF
Q
Q
TO
DRIVERS
360
310
260
A R
C R
210
160
110
V CS
FROM
A CS LOW-SIDE
MOSFET
FROM
ERROR AMP
Figure 22. Simplified Control Architecture
60
10
100
400
700
1000
f SW (kHz)
1300
1600
1900
As shown in Figure 22, the emulated current ramp is generated
inside the IC but offers programmability through the RAMPx
pin. Selecting an appropriate value resistor from V IN to the
RAMPx pin programs a desired slope compensation value and,
at the same time, provides a feed forward feature. The benefits
realized by deploying this type of control scheme are that there
is no need to worry about the turn-on current spike corrupting
the current ramp. Also, the current signal is stable because the
Rev. A | Page 12 of 32
Figure 23. R FREQ vs. f SW
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