参数资料
型号: ADP1850ACPZ-R7
厂商: Analog Devices Inc
文件页数: 4/32页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 32LFCSP
标准包装: 1
PWM 型: 电流模式
输出数: 2
频率 - 最大: 1.725MHz
占空比: 90%
电源电压: 2.75 V ~ 20 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 32-WFQFN 裸露焊盘,CSP
包装: 标准包装
其它名称: ADP1850ACPZ-R7DKR
ADP1850
Data Sheet
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
GATE DRIVERS
DHx Rise Time
DHx Fall Time
DLx Rise Time
DLx Fall Time
DHx to DLx Dead Time
C DH = 3 nF, V BST ? V SW = 5 V
C DH = 3 nF, V BST ? V SW = 5 V
C DL = 3 nF
C DL = 3 nF
External 3 nF is connected to DHx and DLx
16
14
16
14
25
ns
ns
ns
ns
ns
DHx or DLx Driver R ON , Sourcing
R ON_SOURCE
Sourcing 2 A with a 100 ns pulse
2
Ω
Current 1
Sourcing 1 A with a 100 ns pulse, V IN = 3 V
2.3
Ω
DHx or DLx Driver R ON , Tempco
DHx or DLx Driver R ON , Sinking
TC RON
R ON_SINK
V IN = 3 V or 12 V
Sinking 2 A with a 100 ns pulse
0.3
1.5
%/ o C
Ω
Current 1
Sinking 1 A with a 100 ns pulse, V IN = 3 V
2
Ω
DHx Maximum Duty Cycle
DHx Maximum Duty Cycle
Minimum DHx On Time
Minimum DHx Off Time
Minimum DLx On Time
f SW = 300 kHz
f SW = 1500 kHz
f SW = 200 kHz to 1500 kHz
f SW = 200 kHz to 1500 kHz
f SW = 200 kHz to 1500 kHz
90
50
135
335
285
%
%
ns
ns
ns
COMPx VOLTAGE RANGE
COMPx Pulse Skip Threshold
COMPx Clamp High Voltage
V COMP,THRES
V COMP,HIGH
In pulse skip mode
2.25
0.9
V
V
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
T TMSD
155
20
° C
° C
OVERVOLTAGE AND POWER GOOD
THRESHOLDS
FBx Overvoltage Threshold
V OV
V FB rising
0.635
0.65
0.665
V
FBx Overvoltage Hysteresis
30
mV
FBx Undervoltage Threshold
V UV
V FB falling
0.525
0.55
0.578
V
FBx Undervoltage Hysteresis
30
mV
TRKx INPUT VOLTAGE RANGE
0
5
V
FBx TO TRKx OFFSET VOLTAGE
TRKx = 0.1 V to 0.57 V, offset = V FB ? V TRK
?10
0
+10
mV
SOFT START
SSx Output Current
I SS
During start-up
4.6
6.5
8.4
μA
SSx Pull-Down Resistor
During a fault condition
3
FBx to SSx Offset
V SS = 0.1 V to 0.6 V, offset = V FB ? V SS
?10
+10
mV
PGOODx
PGOODx Pull-up Resistor
PGOODx Delay
Over Voltage or Under Voltage
R PGOOD
Internal pull-up resistor to VCCO
This is the minimum duration required to trip
12.5
12
10
μs
μs
the PGOOD signal
Minimum Duration
ILIM1, ILIM2 Threshold Voltage 1
ILIM1, ILIM2 Output Current
Current Sense Blanking Period
Relative to PGNDx
ILIMx = PGNDx
After DLx goes high, current limit is not sensed
?5
47
0
50
100
+5
53
mV
μA
ns
during this period
INTEGRATED RECTIFIER
At 20 mA forward current
16
Ω
(BOOST DIODE) RESISTANCE
ZERO CURRENT CROSS OFFSET
In pulse skip mode only, f SW = 600 kHz
0
2
4
mV
(SWx TO PGNDx) 1
1
2
Guaranteed by design.
Connect V IN to VCCO when 2.75 V < V IN < 5.5 V.
Rev. A | Page 4 of 32
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