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参数资料
| 型号： | ADP1883ARMZ-1.0-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 20/40页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 10-MSOP |
| 标准包装： | 1 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 1MHz |
| 占空比： | 45% |
| 电源电压： | 2.75 V ~ 20 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 包装： | 标准包装 |
| 其它名称： | ADP1883ARMZ-1.0-R7DKR |
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ADP1882/ADP1883
PROGRAMMING RESISTOR (RES) DETECT CIRCUIT
Upon startup, one of the first blocks to become active is the RES
detect circuit. This block powers up before a soft start begins. It
and is programmed to identify four possible resistor values:
47 kΩ, 22 kΩ, open, and 100 kΩ.
ADP1882
Q1
DRVH
SW
Q2
VALLEY CURRENT-LIMIT SETTING
The architecture of the ADP1882/ADP1883 is based on valley
current-mode control. The current limit is determined by three
components: the R ON of the lower-side MOSFET, the error ampli-
fier output voltage swing (COMP), and the current-sense gain.
The COMP range is internally fixed at 1.5 V. The current-sense
gain is programmable via an external resistor at the DRVL pin
(see the Programming Resistor (RES) Detect Circuit section).
The R ON of the lower-side MOSFET can vary over temperature
and usually has a positive T C (meaning that it increases with
temperature); therefore, it is recommended that the current-
DRVL
CS GAIN
RES
sense gain resistor be programmed based on the rated R ON of
the MOSFET at 125°C.
I CLIM = I LOAD × ? ? 1 ? K I ? ?
PROGRAMMING
Figure 68. Programming Resistor Location
The RES detect circuit digitizes the value of the resistor at the
DRVL pin (Pin 6). An internal ADC outputs a 2-bit digital code
that is used to program four separate gain configurations in the
current-sense amplifier (see Figure 69). Each configuration
corresponds to a current-sense gain (A CS ) of 3 V/V, 6 V/V, 12 V/V,
and 24 V/V, respectively (see Table 5 and Table 6). This variable
is used for the valley current-limit setting, which sets up the
appropriate current-sense signal gain for a given application
and sets the compensation necessary to achieve loop stability
(see the Valley Current-Limit Setting and Compensation
Network sections).
Because the ADP1882/ADP1883 are based on valley current
control, the relationship between I CLIM and I LOAD is as follows:
? 2 ?
where:
I CLIM is the desired valley current limit.
I LOAD is the current load.
K I is the ratio between the inductor ripple current and the
desired average load current (see Figure 10).
Establishing K I helps to determine the inductor value (see the
RIPPLE CURRENT =
I LOAD
3
CS
SW
LOAD CURRENT
AMP
PGND
CS GAIN SET
DRVL
ADC
0.4V
VALLEY CURRENT LIMIT
Figure 70. Valley Current Limit to Average Current Relation
When the desired valley current limit (I CLIM ) has been determined,
the current-sense gain can be calculated by using the following
I CLIM =
RES
Figure 69. RES Detect Circuit for Current-Sense Gain Programming
Table 5. Current-Sense Gain Programming
Resistor (kΩ) A CS (V/V)
47 3.25
22 6.5
expression:
1 . 5 V
A CS × R ON
where:
A CS is the current-sense gain multiplier (see Table 5 and Table 6).
R ON is the channel impedance of the lower-side MOSFET.
Open
100
26
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Rev. 0 | Page 20 of 40
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