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参数资料
| 型号： | ADP1883ARMZ-1.0-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 21/40页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 10-MSOP |
| 标准包装： | 1 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 1MHz |
| 占空比： | 45% |
| 电源电压： | 2.75 V ~ 20 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 包装： | 标准包装 |
| 其它名称： | ADP1883ARMZ-1.0-R7DKR |
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ADP1882/ADP1883
Although the ADP1882/ADP1883 have only four discrete current-
outline several available options for the valley current setpoint
based on various R ON values.
Table 6. Valley Current Limit Program 1
Valley Current Level
and Figure 71. The inductor chosen must be rated to handle the
plus the peak-to-peak inductor ripple current (see the Inductor
Selection section). In addition, the peak current value must be
used to compute the worst-case power dissipation in the
MOSFETs (see Figure 72).
R ON
(mΩ)
47 kΩ
A CS = 3.4 V/V
22 kΩ
A CS = 6.6 V/V
Open
A CS = 26.7 V/V
100 kΩ
A CS = 13.4 V/V
MAXIMUM DC LOAD
49A
1.5
38.5
CURRENT
2
2.5
3
38.46
28.8
23.1
19.2
INDUCTOR
CURRENT
35A
39.5A
Δ I = 65%
OF 37A
37A
COMP
OUTPUT
Δ I = 45% 32.25A
3.5
4.5
32.97
25.64
16.5
12.8
Δ I = 33%
OF 30A
30A
OF 32.25A
5
5.5
23.08
20.98
11.5
10.5
VALLEY CURRENT-LIMIT
2.4V
10
23.08
11.54
5.77
THRESHOLD (SET FOR 25A)
15
18
30.769
25.641
15.38
12.82
7.692
6.41
3.85
3.21
COMP
OUTPUT
SWING
1
Refer to Figure 71 for more information and a graphical representation.
39
37
RES = 47k ?
0A
0.9V
35
33
31
29
27
25
A CS = 6.6V/V
Figure 72. Valley Current-Limit Threshold in Relation to Inductor Ripple Current
HICCUP MODE DURING SHORT CIRCUIT
A current-limit violation occurs when the current across
23
21
19
17
15
13
11
9
7
RES = OPEN
A CS = 26.7V/V
RES = 100k ?
A CS = 13.4V/V
RES = 22k ?
A CS = 3.4V/V
the source and drain of the lower-side MOSFET exceeds the
current-limit setpoint. When 32 current-limit violations are
detected, the controller enters the idle mode and turns off the
MOSFETs for 6 ms, allowing the converter to cool down. Then,
the controller reestablishes soft start and begins to cause the
output to ramp up again (see Figure 73). While the output
5
3
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18
ramps up, COMP is monitored to determine if the violation is
still present. If it is still present, the idle event occurs again,
R ON (m ? )
Figure 71. Valley Current-Limit Value vs. R ON of the Lower-Side MOSFET
for Each Programming Resistor (RES)
followed by the full-chip power-down sequence. This cycle
continues until the violation no longer exists. If the violation
disappears, the converter is allowed to switch normally,
maintaining regulation.
REPEATED CURRENT-LIMIT
VIOLATION DETECTED
HS
A PREDE TERMINED NUMBER
SOFT START IS
CLIM
OF PULS ES IS COUNTED TO REINITIALIZED TO
ALLO W THE CONVERTER MONITOR IF THE
TO COOL DOWN
VIOLATION
STILL EXISTS
ZERO
CURRENT
Figure 73. Idle Mode Entry Sequence Due to Current-Limit Violations
Rev. 0 | Page 21 of 40
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