- 您现在的位置：买卖IC网 > PDF目录298814 > ADS1298RIZXGT (TEXAS INSTRUMENTS INC) SPECIALTY ANALOG CIRCUIT, PBGA64 PDF资料下载
参数资料
| 型号： | ADS1298RIZXGT |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 模拟信号调理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PBGA64 |
| 封装： | 8 X 8 MM, LEAD FREE, PLASTIC, NFBGA-64 |
| 文件页数： | 25/87页 |
| 文件大小： | 1430K |
| 代理商： | ADS1298RIZXGT |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页当前第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页
SBAS459H
– JANUARY 2010 – REVISED MAY 2011
SPI INTERFACE
The SPI-compatible serial interface consists of four signals: CS, SCLK, DIN, and DOUT. The interface reads
conversion data, reads and writes registers, and controls the ADS129x operation. The DRDY output is used as a
status signal to indicate when data are ready. DRDY goes low when new data are available.
Chip Select (CS)
Chip select (CS) selects the ADS129x devices for SPI communication. While CS is low the serial interface is
active CS must remain low for the entire duration of the serial communication. After the serial communication is
finished, always wait four or more tCLK cycles before taking CS high. When CS is taken high, the serial interface
is reset, SCLK and DIN are ignored, and DOUT enters a high-impedance state. DRDY asserts when data
conversion is complete, regardless of whether CS is high or low.
While ADS129x is selected the device will attempt to decode and execute commands every eight serial clocks. If
the devices ceases to execute serial commands, it is possible extra clock pulses were presented and placed the
serial interface in an unknown state. Take CS high and back low to reset the serial interface to a known state.
Serial Clock (SCLK)
SCLK is the serial peripheral interface (SPI) serial clock. It is used to shift in commands and shift out data from
the device. The serial clock (SCLK) features a Schmitt-triggered input and clocks data on the DIN and DOUT
pins into and out of the ADS129x. Even though the input has hysteresis, it is recommended to keep SCLK as
clean as possible to prevent glitches from accidentally forcing a clock event. The absolute maximum limit for
SCLK is specified in the Serial Interface Timing table.
While ADS129x is selected(CS = LOW), the device attempts to decode and execute commands every eight
serial clocks. It is therefore recommended that multiples of 8 SCLKs be presented every serial transfer to keep
the interface in a normal operating mode. If the interface ceases to function because of extra serial clocks, it can
be reset by toggling CS high and back to low.
For a single device, the minimum speed needed for the SCLK depends on the number of channels, number of
bits of resolution, and output data rate. (For multiple cascaded devices, see the Cascade Mode subsection of the
Multiple Device Configuration section.)
tSCLK < (tDR – 4tCLK)/(NBITS × NCHANNELS + 24)
(6)
For example, if the ADS1298 is used in a 500SPS mode (eight channels, 24-bit resolution), the minimum SCLK
speed is 110kHz.
Data retrieval can be done either by putting the device in RDATAC mode or by issuing a RDATA command for
data on demand. The above SCLK rate limitation applies to RDATAC. For the RDATA command, the limitation
applies if data must be read between two consecutive DRDY signals. The above calculation assumes that there
are no other commands issued between data captures.
Data Input (DIN)
The data input pin (DIN) is used along with SCLK to communicate with the ADS129x (opcode commands and
register data). The device latches data on DIN on the falling edge of SCLK.
Copyright
2010–2011, Texas Instruments Incorporated
31
相关PDF资料 |
PDF描述 |
|---|---|
| ADSP-1401TN/883B | 16-BIT, MICROPROGRAM SEQUENCER, PDIP48 |
| ADSP-21160NCB-100 | 64-BIT, 50 MHz, OTHER DSP, PBGA400 |
| ADSP-21365YSWZ-2BA | 16-BIT, 55.55 MHz, OTHER DSP, PQFP144 |
| ADSP-2181BS-160 | 24-BIT, 20 MHz, OTHER DSP, PQFP128 |
| ADUC845BCPZ8-3 | 8-BIT, FLASH, 12.58 MHz, MICROCONTROLLER, QCC56 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADS1299 | 制造商:TI 制造商全称:Texas Instruments 功能描述:Low-Noise, 8-Channel, 24-Bit Analog Front-End for Biopotential Measurements |
| ADS1299_1211 | 制造商:TI 制造商全称:Texas Instruments 功能描述:Low-Noise, 8-Channel, 24-Bit Analog Front-End for Biopotential Measurements |
| ADS1299-4PAG | 功能描述:IC AFE 4-CH 24BIT 64TQFP 制造商:texas instruments 系列:- 包装:托盘 零件状态:在售 位数:24 通道数:4 电压 - 电源，模拟:5V 电压 - 电源，数字:1.8 V ~ 3.6 V 封装/外壳:64-TQFP 供应商器件封装:64-TQFP（10x10） 标准包装:160 |
| ADS1299-4PAGR | 功能描述:IC AFE 4-CH 24BIT 64TQFP 制造商:texas instruments 系列:- 包装:剪切带（CT） 零件状态:在售 位数:24 通道数:4 功率（W）:24mW 电压 - 电源，模拟:4.75 V ~ 5.25 V 电压 - 电源，数字:1.8 V ~ 3.6 V 封装/外壳:64-TQFP 供应商器件封装:64-TQFP（10x10） 标准包装:1 |
| ADS1299-6PAG | 功能描述:IC AFE 6-CH 24BIT 64TQFP 制造商:texas instruments 系列:- 包装:托盘 零件状态:在售 位数:24 通道数:6 功率（W）:33mW 电压 - 电源，模拟:5V 电压 - 电源，数字:1.8 V ~ 3.6 V 封装/外壳:64-TQFP 供应商器件封装:64-TQFP（10x10） 标准包装:160 |
发布紧急采购，3分钟左右您将得到回复。