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参数资料
型号： ADS1298RIZXGT
厂商： TEXAS INSTRUMENTS INC
元件分类： 模拟信号调理
英文描述： SPECIALTY ANALOG CIRCUIT, PBGA64
封装： 8 X 8 MM, LEAD FREE, PLASTIC, NFBGA-64
文件页数： 38/87页
文件大小： 1430K
代理商： ADS1298RIZXGT
1
9
17
25
CS
SCLK
DIN
OPCODE1
OPCODE2
DOUT
REGDATA
REGDATA+1
1
9
17
25
CS
SCLK
DIN
OPCODE1
OPCODE2
REGDATA1
REGDATA2
DOUT
ADS1294, ADS1294R
ADS1296, ADS1296R
ADS1298, ADS1298R
www.ti.com
SBAS459H
– JANUARY 2010 – REVISED MAY 2011
RREG: Read From Register
This opcode reads register data. The Register Read command is a two-byte opcode followed by the output of the
register data. The first byte contains the command opcode and the register address. The second byte of the
opcode specifies the number of registers to read
– 1.
First opcode byte: 001r rrrr, where r rrrr is the starting register address.
Second opcode byte: 000n nnnn, where n nnnn is the number of registers to read
– 1.
The 17th SCLK rising edge of the operation clocks out the MSB of the first register, as shown in Figure 49. When
the device is in read data continuous mode, it is necessary to issue a SDATAC command before a RREG
command can be issued. An RREG command can be issued any time. However, because this command is a
multi-byte command, there are restrictions on the SCLK rate depending on the way the SCLKs are issued. See
the Serial Clock (SCLK) subsection of the SPI Interface section for more details. Note that CS must be low for
the entire command.
Figure 49. RREG Command Example: Read Two Registers Starting from Register 00h (ID Register)
(OPCODE 1 = 0010 0000, OPCODE 2 = 0000 0001)
WREG: Write to Register
This opcode writes register data. The Register Write command is a two-byte opcode followed by the input of the
register data. The first byte contains the command opcode and the register address.
The second byte of the opcode specifies the number of registers to write
– 1.
First opcode byte: 010r rrrr, where r rrrr is the starting register address.
Second opcode byte: 000n nnnn, where n nnnn is the number of registers to write
– 1.
After the opcode bytes, the register data follows (in MSB-first format), as shown in Figure 50. WREG command
can be issued any time. However, because this command is a multi-byte command, there are restrictions on the
SCLK rate depending on the way the SCLKs are issued. See the Serial Clock (SCLK) subsection of the SPI
Interface section for more details. Note that CS must be low for the entire command.
Figure 50. WREG Command Example: Write Two Registers Starting from 00h (ID Register)
(OPCODE 1 = 0100 0000, OPCODE 2 = 0000 0001)
Copyright
2010–2011, Texas Instruments Incorporated
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Product Folder Link(s): ADS1294 ADS1294R ADS1296 ADS1296R ADS1298 ADS1298R
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