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参数资料
| 型号： | ADS1298RIZXGT |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 模拟信号调理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PBGA64 |
| 封装： | 8 X 8 MM, LEAD FREE, PLASTIC, NFBGA-64 |
| 文件页数： | 4/87页 |
| 文件大小： | 1430K |
| 代理商： | ADS1298RIZXGT |
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SBAS459H
– JANUARY 2010 – REVISED MAY 2011
BGA PIN ASSIGNMENTS (continued)
NAME
TERMINAL
FUNCTION
DESCRIPTION
RLDIN(2)
3A
Analog input
Right leg drive input to MUX
RLDOUT
3B
Analog output
Right leg drive output
RLDINV
3C
Analog input/output
Right leg drive inverting input
WCT
3D
Analog output
Wilson Central Terminal output
TESTP_PACE_OUT1(2)
3E
Analog input/buffer output
Internal test signal/single-ended buffer output based on register settings
TESTN_PACE_OUT2(2)
3F
Analog input/output
Internal test signal/single-ended buffer output based on register settings
VCAP4
3G
Analog output
Analog bypass capacitor
VREFP
3H
Analog input/output
Positive reference voltage
AVDD
4A
Supply
Analog supply
AVDD
4B
Supply
Analog supply
RLDREF
4C
Analog input
Right leg drive noninverting input
AVSS
4D
Supply
Analog ground
RESV1
4E
Digital input
Reserved for future use; must tie to logic low (DGND).
ADS1294R/6R/8R: modulation clock for respiration measurement, negative
RESP_MODN
4F
Analog output
side.
ADS1294/6/8: leave floating.
ADS1294R/6R/8R: modulation clock for respiration measurement, positive
RESP_MODP
4G
Analog output
side.
ADS1294/6/8: leave floating.
VREFN
4H
Analog input
Negative reference voltage
AVSS
5A
Supply
Analog ground
AVSS
5B
Supply
Analog ground
AVSS
5C
Supply
Analog ground
AVSS
5D
Supply
Analog ground
GPIO4
5E
Digital input/output
GPIO4 in normal mode
GPIO1
5F
Digital input/output
General purpose input/output pin
PWDN
5G
Digital input
Power-down; active low
VCAP1
5H
Analog input/output
Analog bypass capacitor
AVDD
6A
Supply
Analog supply
AVDD
6B
Supply
Analog supply
AVDD
6C
Supply
Analog supply
DRDY
6D
Digital output
Data ready; active low
GPIO3
6E
Digital input/output
GPIO3 in normal mode
DAISY_IN
6F
Digital input
Daisy-chain input; if not used, short to DGND.
RESET
6G
Digital input
System reset; active low
VCAP2
6H
—
Analog bypass capacitor
AVDD1
7A
Supply
Analog supply for charge pump
VCAP3
7B
—
Analog bypass capacitor; internally generated AVDD + 1.9V.
DGND
7C
Supply
Digital ground
DGND
7D
Supply
Digital ground
GPIO2
7E
Digital input/output
General-purpose input/output pin
CS
7F
Digital input
SPI chip select; active low
START
7G
Digital input
Start conversion
DGND
7H
Supply
Digital ground
AVSS1
8A
Supply
Analog ground for charge pump
CLKSEL
8B
Digital input
Master clock select
DVDD
8C
Supply
Digital power supply
DVDD
8D
Supply
Digital power supply
DOUT
8E
Digital output
SPI data out
SCLK
8F
Digital input
SPI clock
CLK
8G
Digital input/output
External Master clock input or internal clock output.
DIN
8H
Digital input
SPI data in
(2)
Connect unused terminals to AVDD.
12
Copyright
2010–2011, Texas Instruments Incorporated
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