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参数资料
型号： ADSP-BF548MBBCZ-5M
厂商： ANALOG DEVICES INC
元件分类： 数字信号处理
英文描述： 533 MHz Blackfin Embedded Processor: ADSP-BF548MBBCZ-5M Temp Range: –40°C to +85°C Package: 400-Ball CSP_BGA BC-400-1
中文描述： 16-BIT, 50 MHz, OTHER DSP, PBGA400
封装： 17 X 17 MM, ROHS COMPLIANT, CSBGA-400
文件页数： 73/100页
文件大小： 3095K
代理商： ADSP-BF548MBBCZ-5M
Rev. D
|
Page 74 of 100
|
May 2011
ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549
ATA/ATAPI-6 Interface Timing
The following tables and figures specify ATAPI timing parame-
ters. For detailed parameter descriptions, refer to the ATAPI
specification (ANSI INCITS 361-2002). Table 58 to Table 61
include ATAPI timing parameter equations. System designers
should use these equations along with the parameters provided
in Table 56 and Table 57. ATAPI timing control registers
should be programmed such that ANSI INCITS 361-2002 speci-
fications are met for the desired transfer type and mode.
Table 56. ATA/ATAPI-6 Timing Parameters
Parameter
Min
Max
Unit
tSK1
Difference in output delay after CLKOUT for ATAPI output pins
1
6ns
tOD
Output delay after CLKOUT for outputs
1
12
ns
tSUD
ATAPI_D0-15 or ATAPI_D0-15A Setup Before CLKOUT
6
ns
tSUI
ATAPI_IORDY Setup Before CLKOUT
6
ns
tSUDU
ATAPI_D0-15 or ATAPI_D0-15A Setup Before ATAPI_IORDY (UDMA-in only)
2
ns
tHDU
ATAPI_D0-15 or ATAPI_D0-15A Hold After ATAPI_IORDY (UDMA-in only)
2.6
ns
1 ATAPI output pins include ATAPI_CS0, ATAPI_CS1, A1-3, ATAPI_DIOR, ATAPI_DIOW, ATAPI_DMACK, ATAPI_D0-15, ATAPI_A0-2A, and ATAPI_D0-15A.
Table 57. ATA/ATAPI-6 System Timing Parameters
Parameter
Source
tSK2
Maximum difference in board propagation delay between any 2 ATAPI output pins1
System Design
tBD
Maximum board propagation delay.
System Design
tSK3
Maximum difference in board propagation delay during a read between ATAPI_IORDY and ATAPI_D0-
15/ATAPI_D0-15A.
System Design
tSK4
Maximum difference in ATAPI cable propagation delay between output pin group A and output pin
group B
2
ATAPI Cable Specification
tCDD
ATAPI cable propagation delay for ATAPI_D0-15 and ATAPI_D0-15A signals.
ATAPI Cable Specification
tCDC
ATAPI cable propagation delay for ATAPI_DIOR, ATAPI_DIOW, ATAPI_IORDY, and ATAPI_DMACK signals. ATAPI Cable Specification
1 ATAPI output pins include ATAPI_CS0, ATAPI_CS1, A1-3, ATAPI_DIOR, ATAPI_DIOW, ATAPI_DMACK, ATAPI_D0-15, ATAPI_A0-2A, and ATAPI_D0-15A.
2 Output pin group A includes ATAPI_DIOR, ATAPI_DIOW, and ATAPI_DMACK. Output pin group B includes ATAPI_CS0, ATAPI_CS1, A1-3, ATAPI_D0-15,
ATAPI_A0-2A, and ATAPI_D0-15A.
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