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| 型号： | ADT7490ARQZ-R7 |
| 厂商： | ON Semiconductor |
| 文件页数： | 23/75页 |
| 文件大小： | 0K |
| 描述： | IC THERM MON FAN CTLR 24-QSOP |
| 产品变化通告： | MFG CHG Notification ADI to ON Semi QSOP 24ld Pkg (MSL) Change 17/Jun/2010 Product Discontinuation 30/Sept/2011 |
| 标准包装： | 1,000 |
| 系列： | dBCool® |
| 功能： | 风扇控制，温度监控器 |
| 传感器类型： | 内部和外部 |
| 感应温度： | -40°C ~ 125°C |
| 精确度： | ±1.5°C（最小值） |
| 拓扑： | ADC，比较器，风扇速度计数器，多路复用器，寄存器库 |
| 输出类型： | SMBus? |
| 输出警报： | 无 |
| 输出风扇： | 是 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 24-QSOP |
| 包装： | 带卷 (TR) |
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ADT7490
Table 24. TEMPERATURE LIMIT REGISTERS
Register Description
0x4E Remote 1 Temperature Low Limit
0x4F Remote 1 Temperature High Limit
0x6A Remote 1 THERM Temp. Limit
0x50 Local Temperature Low Limit
Default
0x81
0x7F
0x64
0x81
Voltage and temperature channels use a window
comparator for error detecting and, therefore, have high and
low limits. Fan speed measurements use only a low limit.
Analog Monitoring Cycle Time
The analog monitoring cycle begins when a 1 is written to
the start bit (Bit 0) of Configuration Register 1 (0x40). The
ADC measures each analog input in turn and, as each
0x51
0x6B
0x52
0x53
0x6C
0x34
0x35
0x3D
Local Temperature High Limit
Local THERM Temperature Limit
Remote 2 Temperature Low Limit
Remote 2 Temperature High Limit
Remote 2 THERM Temp. Limit
PECI Low Limit
PECI High Limit
PECI T CONTROL Limit
0x7F
0x64
0x81
0x7F
0x64
0x81
0x00
0x00
measurement is completed, the result is automatically stored
in the appropriate value register. This round-robin
monitoring cycle continues unless disabled by writing a 0 to
Bit 0 of Configuration Register 1.
As the ADC is normally left to free-run in this manner, the
time taken to monitor all the analog inputs is normally not
of interest, because the most recently measured value of any
input can be read out at any time. For applications where the
monitoring cycle time is important, it can easily be
calculated.
Table 25. T HERM TIMER LIMIT REGISTER
Register Description Default
0x7A THERM Timer Limit 0x00
16-bit Limits
The fan TACH measurements are 16-bit results. The fan
TACH limits are also 16 bits, consisting of a high byte and
low byte. Only high limits exist for fan TACHs because fans
running under speed or stalled are normally the only
conditions of interest. Because the fan TACH period is
actually being measured, exceeding the limit indicates a
slow or stalled fan.
The total number of channels measured consists of
? Six Dedicated Supply Voltage Inputs
? Supply Voltage (V CC Pin)
? Local Temperature
? Two Remote Temperatures
As mentioned previously, the ADC performs round-robin
conversions and takes 11 ms for each voltage measurement,
12 ms for a local temperature reading, and 39 ms for each
remote temperature reading. The total monitoring cycle time
for averaged voltage and temperature monitoring is,
therefore, nominally
Table 26. FAN LIMIT REGISTERS
Register Description
0x54 TACH1 Minimum Low Byte
Default
0xFF
(7 11) ) 12 ) (2 39) + 167 ms (eq. 5)
Fan TACH measurements and PECI thermal measurements
are made in parallel and are not synchronized with the analog
measurements in any way.
0x55
0x56
0x57
0x58
0x59
0x5A
0x5B
TACH1 Minimum High Byte
TACH2 Minimum Low Byte
TACH2 Minimum High Byte
TACH3 Minimum Low Byte
TACH3 Minimum High Byte
TACH4 Minimum Low Byte
TACH4 Minimum High Byte
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
Interrupt Status Registers
The results of limit comparisons are stored in Interrupt
Status Register 1 to Interrupt Status Register 4. The status
register bit for each channel reflects the status of the last
measurement and limit comparison on that channel. If a
measurement is within limits, the corresponding interrupt
status register bit is cleared to 0. If the measurement is out of
limit, the corresponding interrupt status register bit is set to 1.
Out-of-Limit Comparisons
Once all limits have been programmed, the ADT7490 can
be enabled for monitoring. The ADT7490 measures all
voltage and temperature measurements in round-robin
format and sets the appropriate status bit to indicate
out-of-limit conditions. TACH measurements are not part of
this round-robin cycle. Comparisons are done differently
depending on whether the measured value is being
compared to a high or low limit.
High Limit > Comparison Performed
Low Limit ? Comparison Performed
The state of the various measurement channels can be
polled by reading the interrupt status registers over the serial
bus. In Bit 7 (OOL) of Interrupt Status Register 1 (0x41), a
Logic 1 indicates an out-of-limit event has been flagged in
Interrupt Status Register 2. This means the user also needs to
read Interrupt Status Register 2. There is a similar OOL bit in
Interrupt Status Register 2 and Interrupt Status Register 3,
indicating an out-of-limit event in the next status register.
Alternatively, Pin 10 or Pin 14 can be configured as an
SMBALERT output. This hard interrupt automatically
notifies the system supervisor of an out-of-limit condition.
Reading the interrupt status registers clears the appropriate
status bit as long as the error condition that caused the
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