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| 型号： | ADT7490ARQZ-R7 |
| 厂商： | ON Semiconductor |
| 文件页数： | 32/75页 |
| 文件大小： | 0K |
| 描述： | IC THERM MON FAN CTLR 24-QSOP |
| 产品变化通告： | MFG CHG Notification ADI to ON Semi QSOP 24ld Pkg (MSL) Change 17/Jun/2010 Product Discontinuation 30/Sept/2011 |
| 标准包装： | 1,000 |
| 系列： | dBCool® |
| 功能： | 风扇控制，温度监控器 |
| 传感器类型： | 内部和外部 |
| 感应温度： | -40°C ~ 125°C |
| 精确度： | ±1.5°C（最小值） |
| 拓扑： | ADC，比较器，风扇速度计数器，多路复用器，寄存器库 |
| 输出类型： | SMBus? |
| 输出警报： | 无 |
| 输出风扇： | 是 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 24-QSOP |
| 包装： | 带卷 (TR) |
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ADT7490
Disabling Fan Startup Timeout
Although a fan startup makes fan spin-ups much quieter
than fixed-time spin-ups, the option exists to use fixed
spin-up times. Setting Bit 3 (FSPDIS) to 1 in Configuration
Register 7 (Register 0x11) disables the spin-up for two
TACH pulses. Instead, the fan spins up for the fixed time as
selected in Register 0x5C to Register 0x5E.
PWM Logic State
The PWM outputs can be programmed high for 100%
duty cycle (non-inverted) or low for 100% duty cycle
(inverted).
Table 33. PWM1 CONFIGURATION (REG. 0x5C)
Bit Mnemonic Description
Fan Speed Control
The ADT7490 controls fan speed using automatic and
manual modes.
In automatic fan speed control mode, fan speed is
automatically varied with temperature and without CPU
intervention, once initial parameters are set up. The
advantage is that, if the system hangs, the user is guaranteed
that the system is protected from overheating.
In manual fan speed control mode, the ADT7490 allows
the duty cycle of any PWM output to be manually adjusted.
This can be useful if the user wants to change fan speed in
software or adjust PWM duty cycle output for test purposes.
Bits [7:5] of Register 0x5C to Register 0x5E (PWM
Configuration) control the behavior of each PWM output.
[4]
INV
0 = Logic High for 100% PWM Duty
Cycle (Non-inverted)
Table 37. PWM CONFIGURATION REGISTERS
(REG. 0x5C TO REG. 0x5E)
1 = Logic Low for 100% PWM Duty
Cycle (Inverted)
Bit
[7:5]
Mnemonic
BHVR
Description
111 = Manual Mode
Table 34. PWM2 CONFIGURATION (REG. 0x5D)
Once under manual control, each PWM output can be
Bit
[4]
Mnemonic
INV
Description
0 = Logic High for 100% PWM Duty
Cycle
1 = Logic Low for 100% PWM Duty
Cycle
manually updated by writing to Register 0x30 to
Register 0x32 (PWMx current duty cycle registers).
Programming the PWM Current Duty Cycle Registers
The PWM current duty cycle registers are 8-bit registers
Table 35. PWM3 CONFIGURATION (REG. 0x5E)
that allow the PWM duty cycle for each output to be set
anywhere from 0% to 100% in steps of 0.39%. The value to
Bit
[4]
Mnemonic
INV
Description
0 = Logic High for 100% PWM Duty
Cycle (Non-inverted)
be programmed into the PWM MIN register is given by
Value (decimal) = PWM MIN /0.39%
1 = Logic Low for 100% PWM Duty
Cycle (Inverted)
Low Frequency Mode PWM Drive Frequency
The PWM drive frequency can be adjusted for the
application. Register 0x5F to Register 0x61 configure the
PWM frequency for PWM1 to PWM3, respectively.
Table 36. PWM1, PWM2, PWM3 FREQUENCY
REGISTERS (REG. 0x5F TO 0x61)
Example 1
For a PWM duty cycle of 50%,
Value (decimal) = 50%/0.39% = 128 (decimal)
Value = 128 (decimal) or 0x80 (hexadecimal)
Example 2
For a PWM duty cycle of 33%,
Value (decimal) = 33%/0.39% = 85 (decimal)
Value = 85 (decimal) or 0x54 (hexadecimal)
Bit
[2:0]
Mnemonic
FREQ
Description
000 = 11.0 Hz
001 = 14.7 Hz
010 = 22.1 Hz
011 = 29.4 Hz
100 = 35.3 Hz (Default)
101 = 44.1 Hz
110 = 58.8 Hz
111 = 88.2 Hz
Table 38. PW M DUTY CYCLE REGISTERS
Register Description Default
0x30 PWM1 Current Duty Cycle 0xFF (100%)
0x31 PWM2 Current Duty Cycle 0xFF (100%)
0x32 PWM3 Current Duty Cycle 0xFF (100%)
By reading the PWMx current duty cycle registers, the
High Frequency Mode PWM Drive
Setting Bit 3 of Register 0x5F, Register 0x60, and
Register 0x61 enables high frequency mode for Fan 1,
Fan 2, and Fan 3, respectively.
In high frequency mode, the PWM drive frequency is
always 22.5 kHz. When high frequency mode is enabled, the
dc bits are automatically asserted internally and do not need
to be changed.
user can keep track of the current duty cycle on each PWM
output, even when the fans are running in automatic fan
speed control mode or acoustic enhancement mode.
Programming T RANGE
T RANGE defines the distance between T MIN and 100%
PWM. For the ADT7467, ADT7468, and ADT7473,
T RANGE is effectively a slope. For the ADT7475, ADT7476,
and ADT7490, T RANGE is no longer a slope but defines the
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