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| 型号： | ADT7490ARQZ-R7 |
| 厂商： | ON Semiconductor |
| 文件页数： | 65/75页 |
| 文件大小： | 0K |
| 描述： | IC THERM MON FAN CTLR 24-QSOP |
| 产品变化通告： | MFG CHG Notification ADI to ON Semi QSOP 24ld Pkg (MSL) Change 17/Jun/2010 Product Discontinuation 30/Sept/2011 |
| 标准包装： | 1,000 |
| 系列： | dBCool® |
| 功能： | 风扇控制，温度监控器 |
| 传感器类型： | 内部和外部 |
| 感应温度： | -40°C ~ 125°C |
| 精确度： | ±1.5°C（最小值） |
| 拓扑： | ADC，比较器，风扇速度计数器，多路复用器，寄存器库 |
| 输出类型： | SMBus? |
| 输出警报： | 无 |
| 输出风扇： | 是 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 24-QSOP |
| 包装： | 带卷 (TR) |
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ADT7490
Table 92. REGISTER 0x78 ? CONFIGURATION REGISTER 3 (POWER-ON DEFAULT = 0x00)
Bit No.
[0]
[1]
Mnemonic
ALERT
Enable
THERM/
+2.5V IN
R/W (Note 1)
R/W
R/W
Description
ALERT = 1, Pin 10 (PWM2/SMBALERT) is configured as an SMBALERT interrupt output to
indicate out-of-limit error conditions.
ALERT = 0, Pin 10 (PWM2/SMBALERT) is configured as the PWM2 output.
THERM = 1 enables THERM functionality on Pin 22 and Pin 14, if Pin 14 is configured as
THERM, determined by Bit 0 and Bit 1 (Pin 14 Func) of Configuration Register 4 (0x7D).
When THERM is asserted, if the fans are running and the BOOST bit is set, then the fans run
at full speed. Alternatively, THERM can be programmed so that a timer is triggered to time
how long THERM has been asserted.
THERM = 0 enables +2.5V IN measurement on Pin 22 and disables THERM. If Bits [5:7] of
Configuration Register 5 (0x7C) are set, THERM is bidirectional. If they are 0, THERM is a
timer input only.
Pin 14 Func (0x7D)
00
01
10
11
00
01
10
11
THERM/+2.5 V IN (0x78)
0
0
0
0
1
1
1
1
Pin 22
+2.5 V IN
+2.5 V IN
+2.5 V IN
+2.5 V I N
THERM
+2.5 V I N
THERM
THERM
Pin 14
TACH4
TACH4
SMBALERT
N/A
TACH4
THERM
SMBALERT
N/A
[2]
[3]
[4]
[5]
[6]
[7]
BOOST
FAST
DC1
DC2
DC3
DC4
R/W
R/W
R/W
R/W
R/W
R/W
When THERM is an input and BOOST = 1, assertion of THERM causes all fans to run at the
maximum programmed duty cycle for fail ? safe cooling.
FAST = 1 enables fast TACH measurements on all channels. This increases the TACH
measurement rate from once per second to once every 250 ms (4x).
DC1 = 1 enables TACH measurements to be continuously made on TACH1. Fans must be
driven by dc. Setting this bit prevents pulse stretching because it is not required for dc-driven
motors.
DC2 = 1 enables TACH measurements to be continuously made on TACH2. Fans must be
driven by dc. Setting this bit prevents pulse stretching because it is not required for dc-driven
motors.
DC3 = 1 enables TACH measurements to be continuously made on TACH3. Fans must be
driven by dc. Setting this bit prevents pulse stretching because it is not required for dc-driven
motors.
DC4 = 1 enables TACH measurements to be continuously made on TACH4. Fans must be
driven by dc. Setting this bit prevents pulse stretching because it is not required for dc-driven
motors.
1. Bits [3:0] of this register become read-only when the Configuration Register 1 Lock (0x40) bit is set to 1. Any further attempts to write to
Bits [3:0] have no effect.
Table 93. REGISTER 0x79 ? THERM TIMER STATUS REGISTER (POWER-ON DEFAULT = 0x00)
Bit No.
[0]
[7:1]
Mnemonic
ASRT/
TMR0
TMR
R/W
R
R
Description
This bit is set high on the assertion of the THERM input and is cleared on read. If the THERM
assertion time exceeds 45.52 ms, this bit is set and becomes the LSB of the 8-bit TMR
reading. This allows THERM assertion times from 45.52 ms to 5.82 sec to be reported back
with a resolution of 22.76 ms.
Times how long THERM input is asserted. These seven bits read 0 until the THERM
assertion time exceeds 45.52 ms.
Table 94. REGISTER 0x7A ? THERM TIMER LIMIT REGISTER (POWER-ON DEFAULT = 0x00)
Bit No.
[7:0]
Mnemonic
LIMT
R/W
R/W
Description
Sets maximum THERM assertion length allowed before an interrupt is generated. This is an
8-bit limit with a resolution of 22.76 ms allowing THERM assertion limits of 45.52 ms to 5.82 sec
to be programmed. If the THERM assertion time exceeds this limit, Bit 5 (FAN4/THERM) of
Interrupt Status Register 2 (0x42) is set. If the limit value is 0x00, an interrupt is generated
immediately on the assertion of the THERM input. If THERM is configured as an output, the
THERM timer limit should be set to 0xFF to avoid unwanted alerts from being generated.
http://onsemi.com
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