参数资料
型号: AFE7222EVM
厂商: Texas Instruments
文件页数: 83/106页
文件大小: 0K
描述: EVAL MODULE FOR AFE7222
标准包装: 1
主要目的: 接口,模拟前端(AFE)
嵌入式:
已用 IC / 零件: AFE7222
已供物品:
其它名称: 296-30300
AFE7222EVM-ND
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
3.5
3
2.5
2
1.5
1
0.5
0
Normalized Frequency
Frequency
Response(dB)
Frequency Response of Inverse SINC Filter
x
11
QMC_GAINA(10:0)
A Data In
S
11
QMC_GAINB(10:0)
B Data In
A Data Out
B Data Out
12
x
QMC_PHASE(9:0)
10
SLOS711B – NOVEMBER 2011 – REVISED MARCH 2012
Figure 9-11. Inverse SINC Filter Frequency Response (0 to Fdac/2)
9.15 QUADRATURE MODULATION CORRECTION (QMC) – SIMILAR FOR TRANSMIT AND
RECEIVE
The Quadrature Modulator Correction (QMC) block provides a means for changing the phase balance of
the complex signal to compensate for I and Q imbalance present in an analog quadrature modulator. The
block diagram for the QMC block is shown below. The QMC block contains 3 programmable parameters.
Registers QMC_GAINA(10:0) and QMC_GAINB(10:0) control the I and Q path gains and are 11 bit values
with a range of 0 to 1.99. The gain adjustment value is determined by dividing the register value by 1024.
A value of 1024 is therefore a gain of 1, a value of 512 is a gain of 0.5 and a value of 2047 is a gain of
1.99. Note that the I and Q gain can also be controlled by setting the DAC full scale output current.
Register QMC_PHASE(9:0) controls the phase imbalance between I and Q and is a 10-bit value with a
range of –0.125 to +0.125 that is multiplied by the Q sample and added to the I sample.
Figure 9-12. QMC Block Diagram
78
APPLICATION INFORMATION
Copyright 2011–2012, Texas Instruments Incorporated
Product Folder Link(s): AFE7222 AFE7225
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