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参数资料
型号： AGLE3000V2-FFG484C
元件分类： FPGA
英文描述： FPGA, 75264 CLBS, 3000000 GATES, PBGA484
封装： 23 X 23 MM, 2.23 MM HEIGHT, 1 MM PITCH, FBGA-484
文件页数： 89/156页
文件大小： 5023K
代理商： AGLE3000V2-FFG484C
IGLOOe DC and Switching Characteristics
2- 24
Advance v0.3
Table 2-25 Summary of I/O Timing Characteristics—Software Default Settings
Std. Speed Grade, Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V,
Worst-Case VCCI = 3.0 V
I/O Standard
Drive
St
re
ngth
(mA)
Slew
Ra
te
Ca
pac
itiv
e
Load
(p
F)
Ext
er
na
lResist
or
(Ω
)
t DO
U
T
(ns)
t DP
(ns)
t DI
N
(ns)
t PY
(ns)
t PYS
(ns)
t EO
U
T
(n
s)
t ZL
(ns)
t ZH
(ns)
t LZ
(ns)
t HZ
(ns)
t ZLS
(ns)
t ZH
S
(ns)
Units
3.3 V LVTTL /
3.3 V LVCMOS
12 mA
High
5
–
1.55 2.46 0.26 1.31 1.57 1.10 2.51 2.04 3.27 3.96 8.32 7.85
ns
2.5 V LVCMOS
12 mA
High
5
–
1.55 2.50 0.26 1.55 1.76 1.10 2.54 2.22 3.34 3.83 8.35 8.03
ns
1.8 V LVCMOS
12 mA
High
5
–
1.55 2.74 0.26 1.53 1.95 1.10 2.79 2.41 3.66 4.54 8.60 8.21
ns
1.5 V LVCMOS
12 mA
High
5
–
1.55 3.09 0.26 1.72 2.15 1.10 3.15 2.70 3.85 4.66 8.96 8.51
ns
1.2 V LVCMOS
2mA
High
5
–
1.55 4.07 0.26 2.06 2.96 1.10 3.90 3.43 3.80 4.02 9.49 9.03
ns
3.3 V PCI
Per PCI
spec
High
10
25 2 1.55 2.74 0.26 1.19 1.63 1.10 2.80 2.16 3.28 3.96 8.60 7.97
ns
3.3 V PCI-X
Per PCI-X
spec
High
10
25 2 1.55 2.74 0.26 1.21 1.57 1.10 2.80 2.16 3.28 3.96 8.60 7.97
ns
3.3 V GTL
25 mA
High
10
25
1.55 2.09 0.26 2.75
–
1.10 2.10 2.09
–
7.91 7.89
ns
2.5 V GTL
25 mA
High
10
25
1.55 2.16 0.26 2.35
–
1.10 2.20 2.13
–
8.01 7.94
ns
3.3 V GTL+
35 mA
High
10
25
1.55 2.11 0.26 1.61
–
1.10 2.15 2.07
–
7.95 7.88
ns
2.5 V GTL+
33 mA
High
10
25
1.55 2.23 0.26 1.55
–
1.10 2.28 2.11
–
8.08 7.91
ns
HSTL (I)
8 mA
High
20
50
1.55 3.10 0.26 1.94
–
1.10 3.12 3.10
–
8.93 8.91
ns
HSTL (II)
15 mA
High
20
25
1.55 2.93 0.26 1.94
–
1.10 2.98 2.75
–
8.79 8.55
ns
SSTL2 (I)
15 mA
High
30
50
1.55 2.17 0.26 1.39
–
1.10 2.21 2.04
–
8.02 7.84
ns
SSTL2 (II)
18 mA
High
30
25
1.55 2.20 0.26 1.39
–
1.10 2.24 1.97
–
8.05 7.78
ns
SSTL3 (I)
14 mA
High
30
50
1.55 2.32 0.26 1.32
–
1.10 2.37 2.02
–
8.17 7.83
ns
SSTL3 (II)
21 mA
High
30
25
1.55 2.12 0.26 1.32
–
1.10 2.16 1.89
–
7.97 7.70
ns
LVDS/B-LVDS/
M-LVDS
24 mA
High
–
1.55 2.19 0.26 1.88
–
ns
LVPECL
24 mA
High
–
1.55 2.16 0.26 1.70
–
ns
Notes:
1. For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-6 for derating
values.
2. Resistance is used to measure I/O propagation delays as defined in PCI specifications. See Figure 2-12 on
page 2-42 for connectivity. This resistor is not required during normal operation.
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