- 您现在的位置：买卖IC网 > PDF目录166232 > AS5SS256K36ADQ-8.5/883C (AUSTIN SEMICONDUCTOR INC) 256K x 36 SSRAM Flow-Through, Synchronous Burst SRAM PDF资料下载
参数资料
| 型号： | AS5SS256K36ADQ-8.5/883C |
| 厂商： | AUSTIN SEMICONDUCTOR INC |
| 元件分类： | SRAM |
| 英文描述： | 256K x 36 SSRAM Flow-Through, Synchronous Burst SRAM |
| 中文描述： | 256K X 36 STANDARD SRAM, 8.5 ns, PQFP100 |
| 封装： | 14 X 20 MM, 1.40 MM HEIGHT, MS-026, TQFP-100 |
| 文件页数： | 10/16页 |
| 文件大小： | 391K |
| 代理商： | AS5SS256K36ADQ-8.5/883C |
SSRAM
AS5SS256K36 &
AS5SS256K36A
AS5SS256K36 &
AS5SS256K36A
Rev. 3.6 06/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3
Austin Semiconductor, Inc.
PIN DESCRIPTION
Pin Number
SYMBOL
TYPE
DESCRIPTION
37
36
32-35, 44-50,
81, 82, 99,
100
92 (A version)
43 (3 CE version)
SA0
SA1
SA
Input
Synchronous Address Inputs: These inputs are registered and must
meet the setup and hold times around the rising edge of CLK. Two
different pinouts are available for the TQFP packages.
93
94
95
96
BWa\
BWb\
BWc\
BWd\
Input
Synchronous Byte Write Enables: These active LOW inputs allow
individual bytes to be written and must meet the setup and hold times
around the rising edge of CLK. A byte write enable is LOW for a WRITE
cycle and HIGH for a READ cycle. Bwa\ controls DQa pins and DQPa;
Bwb\ controls DQb pins and DQPb; Bwc\ controls DQc pins and DQPc;
Bwd\ controls DQd pins and DQPd. Parity bits are featured on this
device.
87
BWE\
Input
Byte Write Enable: This active LOW input permits BYTE WRITE
operations and must meet the setup and hold items around the rising
edge of CLK.
88
GW\
Input
Global Write: This active LOW input allows a full 36-bit WRITE to occur
independent of the BWE\ and BWx\ lines and must meet the setup and
hold times around the rising edge of CLK.
89
CLK
Input
Clock: CLK registers address, data, chip enable, byte write enables and
burst control inputs on its rising edge. All synchronous inputs must meet
setup and hold times around the clock's rising edge.
98
CE\
Input
Synchronous Chip Enable: This active LOW input is used to enable the
device and conditions the internal use of ADSP\. CE\ is sampled only
when a new external address is loaded.
92
(3 CE version)
CE2\
Input
Synchronous Chip Enable: This active LOW input is used to enable the
device and is sampled only when a new external address is loaded.
CE2\ is only available on the 3 CE version.
97
CE2
Input
Synchronous Chip Enable: This active HIGH input is used to enable the
device and is sampled only when a new external address is loaded.
86
OE\
Input
Output Enable: This active LOW, asynchronous input enables the data
I/O output drivers.
83
ADV\
Input
Synchronous Address Advance: This active LOW input is used to
advance the internal burst counter, controlling burst access after the
external address is loaded. A HIGH on this pin effectively causes wait
states to be generated (no address advance). To ensure use of correct
address during a WRITE cycle, ADV\ must be HIGH at the rising edge of
the first clock after an ADSP\ cycle is initiated.
85
ADSC\
Input
Synchronous Address Status Controller: This active LOW input
interrupts any ongoing burst, causing a new external address to be
registered. A READ or WRITE is performed using the new address if
CE\ is LOW. ADSC\ is also used to place the chip into power-down state
when CE\ is HIGH.
相关PDF资料 |
PDF描述 |
|---|---|
| AS6054 | 1000 MHz - 6000 MHz RF/MICROWAVE WIDE BAND LOW POWER AMPLIFIER |
| AS7C1028-15JC | 256K X 4 STANDARD SRAM, 15 ns, PDSO28 |
| AS7C25512FT32A-85BIN | 512K X 32 STANDARD SRAM, 8.5 ns, PBGA165 |
| AS7C25512NTD32A-166TQI | 512K X 32 ZBT SRAM, 3.5 ns, PQFP100 |
| AS7C3256K18Z-3.5TQC | 256K X 18 STANDARD SRAM, 3.5 ns, PQFP100 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AS5SS256K36DQ10 | 制造商:ASI 功能描述:NEW |
| AS5SS256K36DQ-10/883C | 制造商:AUSTIN 制造商全称:Austin Semiconductor 功能描述:256K x 36 SSRAM Flow-Through, Synchronous Burst SRAM |
| AS5SS256K36DQ-10/IT | 制造商:Micross Components 功能描述:SSRAM-FT, 9.0MB - Trays |
| AS5SS256K36DQ-10/XT | 制造商:AUSTIN 制造商全称:Austin Semiconductor 功能描述:256K x 36 SSRAM Flow-Through, Synchronous Burst SRAM |
| AS5SS256K36DQ-8.5/883C | 制造商:AUSTIN 制造商全称:Austin Semiconductor 功能描述:256K x 36 SSRAM Flow-Through, Synchronous Burst SRAM |
发布紧急采购，3分钟左右您将得到回复。