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参数资料
| 型号： | AT49BV6416T-70TI |
| 厂商： | ATMEL CORP |
| 元件分类： | DRAM |
| 英文描述： | 64-megabit (4M x 16) Page Mode 2.7-volt Flash Memory |
| 中文描述： | 4M X 16 FLASH 2.7V PROM, 70 ns, PDSO48 |
| 封装： | 12 X 20 MM, PLASTIC, MO-142DD, TSOP1-48 |
| 文件页数： | 12/30页 |
| 文件大小： | 293K |
| 代理商： | AT49BV6416T-70TI |
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12
3451C–FLASH–2/05
AT49BV6416(T)
Notes:
1. The DATA FORMAT in each bus cycle is as follows: I/O15 - I/O8 (Don’t Care); I/O7 - I/O0 (Hex). The ADDRESS FORMAT in
each bus cycle is as follows: A11 - A0 (Hex), A11 - A21 (Don’t Care).
2. Since A11 is a Don’t Care, AAA can be replaced with 2AA.
3. Either one of the Product ID Exit commands can be used.
4. SA = sector address. Any word address within a sector can be used to designate the sector address (see pages
14
-
17
for details).
5. Once a sector is in the Hardlock protection mode, it cannot be disabled unless the chip is reset or power cycled.
6. PA is the plane address (A21 - A20).
7. During the fourth bus cycle, the manufacturer code is read from address PA+00000H, the device code is read from address
PA+00001H, and the data in the protection register is read from addresses 000081H - 000088H. PA (A21 - A20) must spec-
ify the same plane address as specified in the third bus cycle.
8. The fast programming option enables the user to program two words in parallel only when V
PP
= 10V. The addresses, Addr0
and Addr1, of the two words, D
IN0
and D
IN1
, must only differ in address A0. This command should be used for manufacturing
purpose only.
9. If data bit D1 is “0”, block B is locked. If data bit D1 is “1”, block B can be reprogrammed.
10. The default state (after power-up) of the configuration register is “00”.
11. Any address within the user programmable register region. Please see
“Protection Register Addressing Table” on page 13
.
12. For the AT49BV6416, xxxx = 0000H. For the AT49BV6416T, xxxx = 3F80H.
13. For the AT49BV6416, xxxx = 0000H. For the AT49BV6416T, xxxx = 0F80H.
5.
Command Definition Table
Command Sequence
Bus
Cycles
1st Bus
Cycle
2nd Bus
Cycle
3rd Bus
Cycle
4th Bus
Cycle
5th Bus
Cycle
6th Bus
Cycle
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Read
1
Addr
D
OUT
Chip Erase
6
555
AA
AAA
(2)
55
555
80
555
AA
AAA
55
555
10
Plane Erase
6
555
AA
AAA
55
555
80
555
AA
AAA
55
PA
(6)
20
Sector Erase
6
555
AA
AAA
55
555
80
555
AA
AAA
55
SA
(4)
30
Word Program
4
555
AA
AAA
55
555
A0
Addr
D
IN
Dual-Word Program
(8)
5
555
AA
AAA
55
555
A1
Addr0
D
IN0
Addr1
D
IN1
Enter Single-pulse Program
Mode
6
555
AA
AAA
55
555
80
555
AA
AAA
55
555
A0
Single-pulse Word Program
Mode
1
Addr
D
IN
Sector Softlock
6
555
AA
AAA
55
555
80
555
AA
AAA
55
SA
(4)
40
Sector Unlock
2
555
AA
SA
(4)
70
Sector Hardlock
6
555
AA
AAA
55
555
80
555
AA
AAA
55
SA
(4)(5)
60
Erase/Program Suspend
1
xxx
B0
Erase/Program Resume
1
PA
(6)
30
Product ID Entry
(7)
3
555
AA
AAA
55
PA+00555
90
Product ID Exit
(3)
3
555
AA
AAA
55
555
F0
Product ID Exit
(3)
1
xxx
FX
Program Protection
Register – Block B
4
555
AA
AAA
55
555
C0
xxxx
(12)
8x
(11)
D
IN
Lock Protection
Register – Block B
4
555
AA
AAA
55
555
C0
xxxx80
(12)
X0
Status of Block B
Protection
4
555
AA
AAA
55
555
90
xxxx80
(13)
D
OUT
(9)
Set Configuration Register
4
555
AA
AAA
55
555
E0
xxx
00/01
(10)
CFI Query
1
X55
98
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相关代理商/技术参数 |
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| AT49BV642D | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:64-megabit (4M x 16) 3-volt Only Flash Memory |
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