- 您现在的位置：买卖IC网 > PDF目录12024 > AT89C51ID2-SLSUM (Atmel)IC 8051 MCU FLASH 64K 44PLCC PDF资料下载
参数资料
| 型号： | AT89C51ID2-SLSUM |
| 厂商： | Atmel |
| 文件页数： | 128/157页 |
| 文件大小： | 0K |
| 描述： | IC 8051 MCU FLASH 64K 44PLCC |
| 产品培训模块： | MCU Product Line Introduction |
| 标准包装： | 972 |
| 系列： | 89C |
| 核心处理器： | 8051 |
| 芯体尺寸： | 8-位 |
| 速度： | 60MHz |
| 连通性： | I²C，SPI，UART/USART |
| 外围设备： | POR，PWM，WDT |
| 输入/输出数： | 34 |
| 程序存储器容量： | 64KB（64K x 8） |
| 程序存储器类型： | 闪存 |
| EEPROM 大小： | 2K x 8 |
| RAM 容量： | 2K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 振荡器型： | 外部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 44-LCC（J 形引线） |
| 包装： | 管件 |
| 配用： | AT89OCD-01-ND - USB EMULATOR FOR AT8XC51 MCU |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页当前第128页第129页第130页第131页第132页第133页第134页第135页第136页第137页第138页第139页第140页第141页第142页第143页第144页第145页第146页第147页第148页第149页第150页第151页第152页第153页第154页第155页第156页第157页
72
AT89C51ID2
4289C–8051–11/05
Power Management
Introduction
Two power reduction modes are implemented in the AT89C51ID2. The Idle mode and
the Power-Down mode. These modes are detailed in the following sections. In addition
to these power reduction modes, the clocks of the core and peripherals can be dynami-
cally divided by 2 using the X2 mode detailed in Section “Enhanced Features”, page 21.
Idle Mode
Idle mode is a power reduction mode that reduces the power consumption. In this mode,
program execution halts. Idle mode freezes the clock to the CPU at known states while
the peripherals continue to be clocked. The CPU status before entering Idle mode is
preserved, i.e., the program counter and program status word register retain their data
for the duration of Idle mode. The contents of the SFRs and RAM are also retained. The
status of the Port pins during Idle mode is detailed in Table 57.
Entering Idle Mode
To enter Idle mode, set the IDL bit in PCON register (see Table 58). The AT89C51ID2
enters Idle mode upon execution of the instruction that sets IDL bit. The instruction that
sets IDL bit is the last instruction executed.
Note:
If IDL bit and PD bit are set simultaneously, the AT89C51ID2 enters Power-Down mode.
Then it does not go in Idle mode when exiting Power-Down mode.
Exiting Idle Mode
There are two ways to exit Idle mode:
1.
Generate an enabled interrupt.
–
Hardware clears IDL bit in PCON register which restores the clock to the
CPU. Execution resumes with the interrupt service routine. Upon completion
of the interrupt service routine, program execution resumes with the
instruction immediately following the instruction that activated Idle mode.
The general purpose flags (GF1 and GF0 in PCON register) may be used to
indicate whether an interrupt occurred during normal operation or during Idle
mode. When Idle mode is exited by an interrupt, the interrupt service routine
may examine GF1 and GF0.
2.
Generate a reset.
–
A logic high on the RST pin clears IDL bit in PCON register directly and
asynchronously. This restores the clock to the CPU. Program execution
momentarily resumes with the instruction immediately following the
instruction that activated the Idle mode and may continue for a number of
clock cycles before the internal reset algorithm takes control. Reset
initializes the AT89C51ID2 and vectors the CPU to address C:0000h.
Note:
During the time that execution resumes, the internal RAM cannot be accessed; however,
it is possible for the Port pins to be accessed. To avoid unexpected outputs at the Port
pins, the instruction immediately following the instruction that activated Idle mode should
not write to a Port pin or to the external RAM.
Power-Down Mode
The Power-Down mode places the AT89C51ID2 in a very low power state. Power-Down
mode stops the oscillator, freezes all clock at known states. The CPU status prior to
entering Power-Down mode is preserved, i.e., the program counter, program status
word register retain their data for the duration of Power-Down mode. In addition, the SFR
相关PDF资料 |
PDF描述 |
|---|---|
| AT91SAM7X128B-CU | IC MCU 128KB FLASH 100TFBGA |
| AT91SAM7XC128B-AU | MCU ARM 128K HS FLASH 100-LQFP |
| ATSAM3U1CA-CU | IC MCU 32BIT 64KB FLASH 100TFBGA |
| 1981584-1 | CONN RCPT MICRO USB TYPE AB |
| 1981568-1 | CONN RCPT MICRO USB B R/A SMD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AT89C51ID2-SMSIM | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:8-bit Flash Microcontroller |
| AT89C51ID2-UM | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:8-bit Flash Microcontroller |
| AT89C51RB2 | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:8-bit Microcontroller with 16K/ 32K Bytes Flash |
| AT89C51RB2/RC2 | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:AT89C51RB2/RC2 [Updated 4/03. 125 Pages] |
| AT89C51RB2_06 | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:8-bit Microcontroller with 16K/ 32K Bytes Flash |
发布紧急采购，3分钟左右您将得到回复。