- 您现在的位置：买卖IC网 > PDF目录12024 > AT89C51ID2-SLSUM (Atmel)IC 8051 MCU FLASH 64K 44PLCC PDF资料下载
参数资料
| 型号： | AT89C51ID2-SLSUM |
| 厂商： | Atmel |
| 文件页数： | 140/157页 |
| 文件大小： | 0K |
| 描述： | IC 8051 MCU FLASH 64K 44PLCC |
| 产品培训模块： | MCU Product Line Introduction |
| 标准包装： | 972 |
| 系列： | 89C |
| 核心处理器： | 8051 |
| 芯体尺寸： | 8-位 |
| 速度： | 60MHz |
| 连通性： | I²C，SPI，UART/USART |
| 外围设备： | POR，PWM，WDT |
| 输入/输出数： | 34 |
| 程序存储器容量： | 64KB（64K x 8） |
| 程序存储器类型： | 闪存 |
| EEPROM 大小： | 2K x 8 |
| RAM 容量： | 2K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 振荡器型： | 外部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 44-LCC（J 形引线） |
| 包装： | 管件 |
| 配用： | AT89OCD-01-ND - USB EMULATOR FOR AT8XC51 MCU |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页第133页第134页第135页第136页第137页第138页第139页当前第140页第141页第142页第143页第144页第145页第146页第147页第148页第149页第150页第151页第152页第153页第154页第155页第156页第157页
83
AT89C51ID2
4289C–8051–11/05
W: Write bit (low level at SDA)
A: Acknowledge bit (low level at SDA)
A: Not acknowledge bit (high level at SDA)
Data: 8-bit data byte
P : STOP condition
In Figure 32 to Figure 35, circles are used to indicate when the serial interrupt flag is set.
The numbers in the circles show the status code held in SSCS. At these points, a ser-
vice routine must be executed to continue or complete the serial transfer. These service
routines are not critical since the serial transfer is suspended until the serial interrupt
flag is cleared by software.
When the serial interrupt routine is entered, the status code in SSCS is used to branch
to the appropriate service routine. For each status code, the required software action
Master Transmitter Mode
In the master transmitter mode, a number of data bytes are transmitted to a slave
receiver (Figure 32). Before the master transmitter mode can be entered, SSCON must
be initialised as follows:
CR0, CR1 and CR2 define the internal serial bit rate if external bit rate generator is not
used. SSIE must be set to enable TWI. STA, STO and SI must be cleared.
The master transmitter mode may now be entered by setting the STA bit. The 2-wire
logic will now test the 2-wire bus and generate a START condition as soon as the bus
becomes free. When a START condition is transmitted, the serial interrupt flag (SI bit in
SSCON) is set, and the status code in SSCS will be 08h. This status must be used to
vector to an interrupt routine that loads SSDAT with the slave address and the data
direction bit (SLA+W).
When the slave address and the direction bit have been transmitted and an acknowl-
edgement bit has been received, SI is set again and a number of status code in SSCS
are possible. There are 18h, 20h or 38h for the master mode and also 68h, 78h or B0h if
the slave mode was enabled (AA=logic 1). The appropriate action to be taken for each
of these status code is detailed in Table . This scheme is repeated until a STOP condi-
tion is transmitted.
SSIE, CR2, CR1 and CR0 are not affected by the serial transfer and are referred to
Table 7 to Table 11. After a repeated START condition (state 10h) the TWI module may
switch to the master receiver mode by loading SSDAT with SLA+R.
Master Receiver Mode
In the master receiver mode, a number of data bytes are received from a slave transmit-
ter (Figure 33). The transfer is initialized as in the master transmitter mode. When the
START condition has been transmitted, the interrupt routine must load SSDAT with the
7-bit slave address and the data direction bit (SLA+R). The serial interrupt flag SI must
then be cleared before the serial transfer can continue.
Table 62. SSCON Initialization
CR2
SSIE
STA
STO
SI
AA
CR1
CR0
bit rate
1
0
X
bit rate
相关PDF资料 |
PDF描述 |
|---|---|
| AT91SAM7X128B-CU | IC MCU 128KB FLASH 100TFBGA |
| AT91SAM7XC128B-AU | MCU ARM 128K HS FLASH 100-LQFP |
| ATSAM3U1CA-CU | IC MCU 32BIT 64KB FLASH 100TFBGA |
| 1981584-1 | CONN RCPT MICRO USB TYPE AB |
| 1981568-1 | CONN RCPT MICRO USB B R/A SMD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AT89C51ID2-SMSIM | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:8-bit Flash Microcontroller |
| AT89C51ID2-UM | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:8-bit Flash Microcontroller |
| AT89C51RB2 | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:8-bit Microcontroller with 16K/ 32K Bytes Flash |
| AT89C51RB2/RC2 | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:AT89C51RB2/RC2 [Updated 4/03. 125 Pages] |
| AT89C51RB2_06 | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:8-bit Microcontroller with 16K/ 32K Bytes Flash |
发布紧急采购，3分钟左右您将得到回复。