参数资料
型号: ATAM893T-TKQ
厂商: Atmel
文件页数: 24/98页
文件大小: 0K
描述: IC MON TIRE-PRESS ATARX9X SER
标准包装: 4,000
系列: MARC4
核心处理器: MARC4
芯体尺寸: 4-位
速度: 4MHz
连通性: SSI(2 线,3 线)
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 16
程序存储器容量: 4KB(4K x 8)
程序存储器类型: EEPROM
EEPROM 大小: 64 x 16
RAM 容量: 256 x 4
电压 - 电源 (Vcc/Vdd): 1.8 V ~ 6.5 V
振荡器型: 内部
工作温度: -40°C ~ 125°C
封装/外壳: 20-SOIC(0.209",5.30mm 宽)
包装: 带卷 (TR)
30
4680C–4BMCU–01/05
ATAM893-D
5.2.4.1
Port 4 Data Register (P4DAT)
5.2.4.2
Port 4 Control Register (P4CR) Byte Write
P4xM2, P4xM1 Port 4x Interrupt Mode/Direction Code
5.2.5
Bi-directional Port 6
The bi-directional Port 6 is a bit-wise configurable I/O port and provides the external pins for the
Timer 3. As a normal port, it performs in exactly the same way as bi-directional Port 6 (see Fig-
ure 5-6 on page 29). Two additional multiplexes allow data and port direction control to be
passed over to other internal modules (Timer 3). The I/O pin for the T3I line has an additional
mode to generate a Timer 3-interrupt.
All two Port 6 pins can be individually switched by the P6CR register. Figure 5-6 on page 29
shows the internal interfaces to bi-directional Port 6.
Primary register address: '4'hex
Bit 3Bit 2
Bit 1Bit 0
P4DAT
P4DAT3
P4DAT2
P4DAT1
P4DAT0
Reset value: 1111b
Auxiliary register address: '4'hex
Bit 3
Bit 2
Bit 1
Bit 0
P4CR
First write cycle
P41M2
P41M1
P40M2
P40M1
Reset value: 1111b
Bit 7
Bit 6
Bit 5
Bit 4
Second write
cycle
P43M2
P43M1
P42M2
P42M1
Reset value: 1111b
Table 5-4.
Port 4 Control Register
Auxiliary Address: '4'hex First Write Cycle
Second Write Cycle
Code
3 2 1 0
Function
Code
3 2 1 0
Function
x x 1 1
BP40 in input mode
x x 1 1
BP42 in input mode
x x 1 0
BP40 in output mode
x x 1 0
BP42 in output mode
x x 0 1
BP40 enable alternate function (SC for SSI)
x x 0 x
BP42 enable alternate function (T2O for Timer 2)
x x 0 0
BP40 enable alternate function (falling edge interrupt
input for INT3)
1 1 x x
BP43 in input mode
1 1 x x
BP41 in input mode
1 0 x x
BP43 in output mode
1 0 x x
BP41 in output mode
0 1 x x
BP43 enable alternate function (SD for SSI)
0 1 x x
BP41 enable alternate function
(VMI for voltage monitor input)
0 0 x x
BP43 enable alternate function (falling edge interrupt
input for INT3)
0 0 x x
BP41 enable alternate function
(T2I external clock input for Timer 2)
––
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