参数资料
| 型号： | ATAM893T-TKQ |
| 厂商： | Atmel |
| 文件页数： | 60/98页 |
| 文件大小： | 0K |
| 描述： | IC MON TIRE-PRESS ATARX9X SER |
| 标准包装： | 4,000 |
| 系列： | MARC4 |
| 核心处理器： | MARC4 |
| 芯体尺寸： | 4-位 |
| 速度： | 4MHz |
| 连通性： | SSI（2 线，3 线） |
| 外围设备： | 欠压检测/复位，POR，PWM，WDT |
| 输入/输出数： | 16 |
| 程序存储器容量： | 4KB（4K x 8） |
| 程序存储器类型： | EEPROM |
| EEPROM 大小： | 64 x 16 |
| RAM 容量： | 256 x 4 |
| 电压 - 电源 (Vcc/Vdd)： | 1.8 V ~ 6.5 V |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 20-SOIC（0.209"，5.30mm 宽） |
| 包装： | 带卷 (TR) |
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63
4680C–4BMCU–01/05
ATAM893-D
5.3.4.4
8-bit Synchronous Mode
Figure 5-39. 8-bit Synchronous Mode
In the 8-bit synchronous mode, the SSI can operate as either a 2- or 3-wire interface (see sec-
tion “SSI Peripheral Configuration”). The serial data (SD) is received or transmitted in NRZ
format, synchronized to either the rising or falling edge of the shift clock (SC). The choice of
clock edge is defined by the Serial Mode Control bits (SM0,SM1). It should be noted that the
transmission edge refers to the SC clock edge with which the SD changes. To avoid clock skew
problems, the incoming serial input data is shifted in with the opposite edge.
When used together with one of the timer modulator or demodulator stages, the SSI must be set
in the 8-bit synchronous mode 1.
In RX mode, as soon as the SSI is activated (SIR = 0), 8 shift clocks are generated and the
incoming serial data is shifted into the shift register. This first telegram is automatically trans-
ferred into the receive buffer and the SRDY set to 0 indicating that the receive buffer contains
valid data. At the same time an interrupt (if enabled) is generated. The SSI then continues shift-
ing in the following 8-bit telegram. If, during this time the first telegram has been read by the
controller, the second telegram will also be transferred in the same way into the receive buffer
and the SSI will continue clocking in the next telegram. Should, however, the first telegram not
have been read (SRDY = 1), then the SSI will stop, temporarily holding the second telegram in
the shift register until a certain point of time when the controller is able to service the receive
buffer. In this way no data is lost or overwritten.
Deactivating the SSI (SIR = 1) in mid-telegram will immediately stop the shift clock and latch the
present contents of the shift register into the receive buffer. This can be used for clocking in a
data telegram of less than 8 bits in length. Care should be taken to read out the final complete
8-bit data telegram of a multiple word message before deactivating the SSI (SIR = 1) and termi-
nating the reception. After termination, the shift register contents will overwrite the receive
buffer.
SC
DATA
SD/TO2
1
0
101
00
Bit 7
Bit 0
1
0
101
00
Bit 7
Bit 0
Data: 00110101
(rising edge)
(falling edge)
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ATAM893T-TKQYD | 功能描述:4位微控制器 - MCU Marc4 micrium 4 k FLASH RoHS:否 最大时钟频率:32 KHz/4 MHz 程序存储器大小:4 KB 封装 / 箱体:SSO-20 制造商:Atmel 核心:MARC4 数据总线宽度:4 bit 安装风格:SMD/SMT |
| ATAM893T-TKS | 功能描述:IC MON TIRE-PRESS ATARX9X SER RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:MARC4 标准包装:1,500 系列:AVR® ATtiny 核心处理器:AVR 芯体尺寸:8-位 速度:16MHz 连通性:I²C，LIN，SPI，UART/USART，USI 外围设备:欠压检测/复位，POR，PWM，温度传感器，WDT 输入/输出数:16 程序存储器容量:8KB（4K x 16） 程序存储器类型:闪存 EEPROM 大小:512 x 8 RAM 容量:512 x 8 电压 - 电源 (Vcc/Vdd):2.7 V ~ 5.5 V 数据转换器:A/D 11x10b 振荡器型:内部 工作温度:-40°C ~ 125°C 封装/外壳:20-SOIC（0.295"，7.50mm 宽） 包装:带卷 (TR) |
| ATAM893T-TKSYD | 功能描述:4位微控制器 - MCU Marc4 micrium 4k FLASH RoHS:否 最大时钟频率:32 KHz/4 MHz 程序存储器大小:4 KB 封装 / 箱体:SSO-20 制造商:Atmel 核心:MARC4 数据总线宽度:4 bit 安装风格:SMD/SMT |
| ATAM893X-TKHYZ | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:Flash Version for ATAR080, ATAR090/890 and ATAR092/892 |
| ATAM893X-TKQYZ | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:Flash Version for ATAR080, ATAR090/890 and ATAR092/892 |
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